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author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2009-01-11 17:48:56 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2009-01-16 10:22:27 +0900 |
commit | c9935c992575922b7ef13eec0656ed8665d324e3 (patch) | |
tree | 18f3c75d2877e3357b14a0c12a277adca5ca885e /board/ms7750se/lowlevel_init.S | |
parent | a5b04d00bfeb940c62232972ce644d50b45797f9 (diff) | |
download | u-boot-imx-c9935c992575922b7ef13eec0656ed8665d324e3.zip u-boot-imx-c9935c992575922b7ef13eec0656ed8665d324e3.tar.gz u-boot-imx-c9935c992575922b7ef13eec0656ed8665d324e3.tar.bz2 |
sh: Fix compile error on lowlevel_init file
lowlevel_init of SH was corrected to use the write/readXX macro.
However, there was a problem that was not able to be compiled partially.
This patch corrected this.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/ms7750se/lowlevel_init.S')
-rw-r--r-- | board/ms7750se/lowlevel_init.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S index 7108019..5e09a39 100644 --- a/board/ms7750se/lowlevel_init.S +++ b/board/ms7750se/lowlevel_init.S @@ -84,7 +84,7 @@ init_bsc: write32 MCR_A, MCR_D1 /* Set SDRAM mode */ - write8 SDMR3_A, #0 + write8 SDMR3_A, SDMR3_D ! Do you need PCMCIA setting? ! If so, please add the lines here... @@ -108,7 +108,7 @@ init_bsc: write32 MCR_A, MCR_D2 /* Set SDRAM mode */ - write8 SDMR3_A, #0 + write8 SDMR3_A, SDMR3_D rts nop @@ -146,6 +146,7 @@ RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */ RTCOR_A: .long RTCOR RTCOR_D: .long RTCOR_D_VALUE /* Set refresh time (about 15us) */ SDMR3_A: .long SDMR3_ADDRESS +SDMR3_D: .long 0x00 MCR_A: .long MCR MCR_D1: .long MCR_D1_VALUE MCR_D2: .long MCR_D2_VALUE |