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authorKumar Gala <galak@kernel.crashing.org>2008-07-14 14:07:02 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-07-14 20:19:59 -0500
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85xx: Add some L1/L2 SPR register definitions
Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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