* Code cleanup:

  - remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)

7 files changed, 21 insertions, 23 deletions

diff --git a/board/mpl/pip405/Makefile b/board/mpl/pip405/Makefile
index b6cc531..a818d08 100644
--- a/board/mpl/pip405/Makefile
+++ b/board/mpl/pip405/Makefile
@@ -34,7 +34,7 @@ OBJS	= $(BOARD).o \
 SOBJS	= init.o
 
 $(LIB):	$(OBJS) $(SOBJS)
-	$(AR) crv $@ $^
+	$(AR) crv $@ $(OBJS)
 
 clean:
 	rm -f $(SOBJS) $(OBJS)
diff --git a/board/mpl/pip405/cmd_pip405.c b/board/mpl/pip405/cmd_pip405.c
index 0d1ce11..4cc3776 100644
--- a/board/mpl/pip405/cmd_pip405.c
+++ b/board/mpl/pip405/cmd_pip405.c
@@ -33,7 +33,6 @@ extern void print_pip405_info(void);
 extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
 
 
-
 /* ------------------------------------------------------------------------- */
 
 int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
@@ -59,5 +58,12 @@ int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	return (do_mplcommon(cmdtp, flag, argc, argv));
 }
+cmd_tbl_t U_BOOT_CMD(pip405) = MK_CMD_ENTRY(
+	"pip405",	6,	1,	do_pip405,
+	"pip405  - PIP405 specific Cmds\n",
+	"flash mem [SrcAddr] - updates U-Boot with image in memory\n"
+	"pip405 flash floppy [SrcAddr] - updates U-Boot with image from floppy\n"
+	"pip405 flash mps - updates U-Boot with image from MPS\n"
+);
 
 /* ------------------------------------------------------------------------- */
diff --git a/board/mpl/pip405/init.S b/board/mpl/pip405/init.S
index 4a70ec9..a0c76dd 100644
--- a/board/mpl/pip405/init.S
+++ b/board/mpl/pip405/init.S
@@ -49,7 +49,7 @@
 #include <asm/mmu.h>
 
 
- 	.globl	ext_bus_cntlr_init
+	.globl	ext_bus_cntlr_init
 ext_bus_cntlr_init:
   mflr    r4                      /* save link register */
   bl      ..getAddr
@@ -58,7 +58,7 @@ ext_bus_cntlr_init:
   mtlr    r4                      /* restore link register */
   addi    r4,0,14                 /* set ctr to 14; used to prefetch */
   mtctr   r4                      /* 14 cache lines to fit this function */
-                                   /* in cache (gives us 8x14=112 instrctns) */
+				   /* in cache (gives us 8x14=112 instrctns) */
 ..ebcloop:
   icbt    r0,r3                   /* prefetch cache line for addr in r3 */
   addi    r3,r3,32								/* move to next cache line */
@@ -211,10 +211,9 @@ ext_bus_cntlr_init:
  * Description:  Configures the internal SRAM memory. and setup the
  *               Stackpointer in it.
  *----------------------------------------------------------------------------- */
-        .globl  sdram_init
+	.globl  sdram_init
 
 sdram_init:
 
 
   blr
-
diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c
index 87ca6ef..a77e2c9 100644
--- a/board/mpl/pip405/pip405.c
+++ b/board/mpl/pip405/pip405.c
@@ -530,7 +530,6 @@ int board_pre_init (void)
 	mtdcr (memcfgd, tmp);
 
 
-
    /*-------------------------------------------------------------------------+
    | Interrupt controller setup for the PIP405 board.
    | Note: IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -673,7 +672,6 @@ int overwrite_console (void)
 }
 
 
-
 extern int isa_init (void);
 
 
@@ -943,5 +941,3 @@ void ide_set_reset (int idereset)
 	}
 	out8 (PLD_SCSI_RST_REG, resreg);
 }
-
-
diff --git a/board/mpl/pip405/pip405.h b/board/mpl/pip405/pip405.h
index 10f6479..c2411a3 100644
--- a/board/mpl/pip405/pip405.h
+++ b/board/mpl/pip405/pip405.h
@@ -131,7 +131,6 @@ void user_led1(unsigned char on);
 #define UART1_CR	((PER_UART1_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13))
 
 
-
 /* Flash CS0 or CS 1 */
 /* 0x7F8FFE80 slowest timing at all... */
 #define FLASH_BME_B	1 	/* Burst enable */
@@ -199,14 +198,3 @@ void user_led1(unsigned char on);
 #define MPS_CR_B	((FLASH_BASE0_PRELIM & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13))
 /* CR register for non Boot */
 #define MPS_CR		((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13))
-
-
-
-
-
-
-
-
-
-
-
diff --git a/board/mpl/pip405/u-boot.lds b/board/mpl/pip405/u-boot.lds
index f221343..9b83ded 100644
--- a/board/mpl/pip405/u-boot.lds
+++ b/board/mpl/pip405/u-boot.lds
@@ -121,6 +121,11 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;
diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug
index f4f9743..d483424 100644
--- a/board/mpl/pip405/u-boot.lds.debug
+++ b/board/mpl/pip405/u-boot.lds.debug
@@ -106,6 +106,11 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;
@@ -128,4 +133,3 @@ SECTIONS
   _end = . ;
   PROVIDE (end = .);
 }
-