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| author | wdenk <wdenk> | 2003-09-10 22:30:53 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2003-09-10 22:30:53 +0000 |
| commit | 7205e4075d8b50e4dd89fe39ed03860b23cbb704 (patch) | |
| tree | 0dfa865e7087ff4ee07967a2531c91ff5645a802 /board/mpl/common/pci_parts.h | |
| parent | 149dded2b178bc0fb62cb6f61b87968d914b580a (diff) | |
| download | u-boot-imx-7205e4075d8b50e4dd89fe39ed03860b23cbb704.zip u-boot-imx-7205e4075d8b50e4dd89fe39ed03860b23cbb704.tar.gz u-boot-imx-7205e4075d8b50e4dd89fe39ed03860b23cbb704.tar.bz2 | |
* Patches by Denis Peter, 9 Sep 2003:
add FAT support for IDE, SCSI and USB
* Patches by Gleb Natapov, 2 Sep 2003:
- cleanup of POST code for unsupported architectures
- MPC824x locks way0 of data cache for use as initial RAM;
this patch unlocks it after relocation to RAM and invalidates
the locked entries.
* Patch by Gleb Natapov, 30 Aug 2003:
new I2C driver for mpc107 bridge. Now works from flash.
* Patch by Dave Ellis, 11 Aug 2003:
- JFFS2: fix typo in common/cmd_jffs2.c
- JFFS2: fix CFG_JFFS2_SORT_FRAGMENTS option
- JFFS2: remove node version 0 warning
- JFFS2: accept JFFS2 PADDING nodes
- SXNI855T: add AM29LV800 support
- SXNI855T: move environment from EEPROM to flash
- SXNI855T: boot from JFFS2 in NOR or NAND flash
* Patch by Bill Hargen, 11 Aug 2003:
fixes for I2C on MPC8240
- fix i2c_write routine
- fix iprobe command
- eliminates use of global variables, plus dead code, cleanup.
Diffstat (limited to 'board/mpl/common/pci_parts.h')
| -rw-r--r-- | board/mpl/common/pci_parts.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h index e5627aa..a57b121 100644 --- a/board/mpl/common/pci_parts.h +++ b/board/mpl/common/pci_parts.h @@ -92,7 +92,7 @@ extern void pci_pip405_write_regs(struct pci_controller *, /* PIIX4 ISA Bridge Function 0 */ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = { {PCI_CFG_PIIX4_SERIRQ, 0xD0, 1}, /* enable Continous SERIRQ Pin */ - {PCI_CFG_PIIX4_GENCFG, 0x00010041, 4}, /* enable SERIRQs, ISA, PNP */ + {PCI_CFG_PIIX4_GENCFG, 0x00018041, 4}, /* enable SERIRQs, ISA, PNP, GPI11 */ {PCI_CFG_PIIX4_TOM, 0xFE, 1}, /* Top of Memory */ {PCI_CFG_PIIX4_XBCS, 0x02C4, 2}, /* disable all peri CS */ {PCI_CFG_PIIX4_RTCCFG, 0x21, 1}, /* enable RTC */ @@ -106,6 +106,7 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = { /* PIIX4 IDE Controller Function 1 */ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = { + {PCI_CFG_PIIX4_BMIBA, 0x0001000, 4}, /* set BMI to a valid address */ {PCI_COMMAND, 0x0001, 2}, /* enable IO access */ #if !defined(CONFIG_MIP405T) {PCI_CFG_PIIX4_IDETIM, 0x80008000, 4}, /* enable Both IDE channels */ @@ -129,10 +130,10 @@ static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = { /* PIIX4 Power Management Function 3 */ static struct pci_pip405_config_entry piix4_pmm_cntrl_f3[] = { - {PCI_COMMAND, 0x0001, 2}, /* enable IO access */ - {PCI_CFG_PIIX4_PMAB, 0x00004000, 4}, /* set PMBA to "valid" value */ - {PCI_CFG_PIIX4_PMMISC, 0x01, 1}, /* enable PMBA IO access */ + {PCI_CFG_PIIX4_PMBA, 0x00004000, 4}, /* set PMBA to "valid" value */ {PCI_CFG_PIIX4_SMBBA, 0x00005000, 4}, /* set SMBBA to "valid" value */ + {PCI_CFG_PIIX4_PMMISC, 0x01, 1}, /* enable PMBA IO access */ + {PCI_COMMAND, 0x0001, 2}, /* enable IO access */ { } /* end of device table */ }; /* PPC405 Dummy only used to prevent autosetup on this host bridge */ |