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authorWolfgang Denk <wd@denx.de>2007-05-05 17:33:22 +0200
committerWolfgang Denk <wd@denx.de>2007-05-05 17:33:22 +0200
commit49db23d4529d8f925f1572dbf1226f319f912580 (patch)
treeae68bc5c19965211d8921b1613cae28ab2236440 /board/mpc8568mds/bcsr.c
parent5499645b3fe17a548af9dfc479ca6e2455f179a2 (diff)
parentffa621a0d12a1ccd81c936c567f8917a213787a8 (diff)
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Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx
Diffstat (limited to 'board/mpc8568mds/bcsr.c')
-rw-r--r--board/mpc8568mds/bcsr.c49
1 files changed, 49 insertions, 0 deletions
diff --git a/board/mpc8568mds/bcsr.c b/board/mpc8568mds/bcsr.c
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+++ b/board/mpc8568mds/bcsr.c
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+/*
+ * Copyright 2007 Freescale Semiconductor.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include "bcsr.h"
+
+void enable_8568mds_duart()
+{
+ volatile uint* duart_mux = (uint *)(CFG_CCSRBAR + 0xe0060);
+ volatile uint* devices = (uint *)(CFG_CCSRBAR + 0xe0070);
+ volatile u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ *duart_mux = 0x80000000; /* Set the mux to Duart on PMUXCR */
+ *devices = 0; /* Enable all peripheral devices */
+ bcsr[5] |= 0x01; /* Enable Duart in BCSR*/
+}
+
+void enable_8568mds_flash_write()
+{
+ volatile u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ bcsr[9] |= 0x01;
+}
+
+void disable_8568mds_flash_write()
+{
+ volatile u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ bcsr[9] &= ~(0x01);
+}