summaryrefslogtreecommitdiff
path: root/board/mpc8540ads/flash.c
diff options
context:
space:
mode:
authorwdenk <wdenk>2004-08-01 23:02:45 +0000
committerwdenk <wdenk>2004-08-01 23:02:45 +0000
commit9aea95307fdb0ffe0d3a98a17ac73e5040c9756a (patch)
tree812e59d74bb6ab942f7c797b6bbcc5e7c2ad4a8f /board/mpc8540ads/flash.c
parent281e00a3be453a169d854f824a460359d10f92bb (diff)
downloadu-boot-imx-9aea95307fdb0ffe0d3a98a17ac73e5040c9756a.zip
u-boot-imx-9aea95307fdb0ffe0d3a98a17ac73e5040c9756a.tar.gz
u-boot-imx-9aea95307fdb0ffe0d3a98a17ac73e5040c9756a.tar.bz2
Patch by Jon Loeliger, 16 Jul 2004:
- support larger DDR memories up to 2G on the PC8540/8560ADS and STXGP3 boards - Made MPC8540/8560ADS be 33Mhz PCI by default. - Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16 and CONFIG_L2_INIT_RAM options. - Refactor Local Bus initialization out of SDRAM setup. - Re-implement new version of LBC11/DDR11 errata workarounds. - Moved board specific PCI init parts out of CPU directory. - Added TLB entry for PCI-1 IO Memory - Updated README.mpc85xxads
Diffstat (limited to 'board/mpc8540ads/flash.c')
-rw-r--r--board/mpc8540ads/flash.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/board/mpc8540ads/flash.c b/board/mpc8540ads/flash.c
index ac2383e..c7d318c 100644
--- a/board/mpc8540ads/flash.c
+++ b/board/mpc8540ads/flash.c
@@ -86,14 +86,12 @@ unsigned long flash_init (void)
flash_info[0].size = size;
-#if !defined(CONFIG_RAM_AS_FLASH)
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
-#endif
#ifdef CFG_ENV_IS_IN_FLASH
/* ENV protection ON by default */