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| author | Kim Phillips <kim.phillips@freescale.com> | 2007-08-16 22:52:48 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2007-08-16 23:12:24 -0500 |
| commit | bbea46f76f767b919070b4829bf34c86bd223248 (patch) | |
| tree | 1c4eec552cd1ede648ef3c8e4a6d6c70f431e536 /board/mpc8349itx | |
| parent | 14778585d1389d86d5846efec29e5fce892680ce (diff) | |
| download | u-boot-imx-bbea46f76f767b919070b4829bf34c86bd223248.zip u-boot-imx-bbea46f76f767b919070b4829bf34c86bd223248.tar.gz u-boot-imx-bbea46f76f767b919070b4829bf34c86bd223248.tar.bz2 | |
mpc83xx: implement board_add_ram_info
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:
DRAM: 256 MB (DDR1, 64-bit, ECC on)
and for boards with SDRAM on the local bus, a line such as this is
added:
SDRAM: 64 MB (local bus)
also replaced some magic numbers with their equivalent define names.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/mpc8349itx')
| -rw-r--r-- | board/mpc8349itx/mpc8349itx.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/board/mpc8349itx/mpc8349itx.c b/board/mpc8349itx/mpc8349itx.c index 125e6c0..c82f784 100644 --- a/board/mpc8349itx/mpc8349itx.c +++ b/board/mpc8349itx/mpc8349itx.c @@ -76,7 +76,7 @@ int fixed_sdram(void) im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;/* Was "2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT" */ - im->ddr.sdram_cfg = SDRAM_CFG_SREN | SDRAM_CFG_SDRAM_TYPE_DDR; + im->ddr.sdram_cfg = SDRAM_CFG_SREN | SDRAM_CFG_SDRAM_TYPE_DDR1; im->ddr.sdram_mode = (0x0000 << SDRAM_MODE_ESD_SHIFT) | (0x0032 << SDRAM_MODE_SD_SHIFT); im->ddr.sdram_interval = @@ -162,7 +162,6 @@ long int initdram(int board_type) ddr_enable_ecc(msize * 1048576); #endif - puts(" DDR RAM: "); /* return total bus RAM size(bytes) */ return msize * 1024 * 1024; } |