diff options
| author | Jon Loeliger <jdl@freescale.com> | 2007-11-02 15:22:01 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-11-02 15:22:01 -0500 |
| commit | 3cac27c1d40b151f295dcfdb514fa928732e4ecf (patch) | |
| tree | 5dbc1813bfa548e8d31879c39c075bfdcbbf8f86 /board/motionpro | |
| parent | 3c89d75409eb26639d36dfa11d4ee3d8b962dc3c (diff) | |
| parent | e60adeac2d8fa30258e1706bb342a3363526e8d7 (diff) | |
| download | u-boot-imx-3cac27c1d40b151f295dcfdb514fa928732e4ecf.zip u-boot-imx-3cac27c1d40b151f295dcfdb514fa928732e4ecf.tar.gz u-boot-imx-3cac27c1d40b151f295dcfdb514fa928732e4ecf.tar.bz2 | |
Merge commit 'remotes/wd/master'
Diffstat (limited to 'board/motionpro')
| -rw-r--r-- | board/motionpro/motionpro.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index f83998e..68257b8 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -138,6 +138,12 @@ long int initdram(int board_type) #ifndef CFG_RAMBOOT ulong test1, test2; + /* According to AN3221 (MPC5200B SDRAM Initialization and + * Configuration), the SDelay register must be written a value of + * 0x00000004 as the first step of the SDRAM contorller configuration. + */ + *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; + /* configure SDRAM start/end for detection */ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */ |