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| author | Stefan Roese <sr@denx.de> | 2007-10-27 13:43:40 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-10-27 13:43:40 +0200 |
| commit | 49801028715cd8bc22863cdfc0ee7919b7a6af4b (patch) | |
| tree | b7344561054c6da1886e0622716ad6da9bb2325b /board/motionpro/motionpro.c | |
| parent | 20d500d531a6b971ce6cc1bf191cb0092cdc0afc (diff) | |
| parent | d78791ae914d4e7c5edca1cdad73b3dc81a4eb82 (diff) | |
| download | u-boot-imx-49801028715cd8bc22863cdfc0ee7919b7a6af4b.zip u-boot-imx-49801028715cd8bc22863cdfc0ee7919b7a6af4b.tar.gz u-boot-imx-49801028715cd8bc22863cdfc0ee7919b7a6af4b.tar.bz2 | |
Merge git://www.denx.de/git/u-boot
Diffstat (limited to 'board/motionpro/motionpro.c')
| -rw-r--r-- | board/motionpro/motionpro.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index f83998e..68257b8 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -138,6 +138,12 @@ long int initdram(int board_type) #ifndef CFG_RAMBOOT ulong test1, test2; + /* According to AN3221 (MPC5200B SDRAM Initialization and + * Configuration), the SDelay register must be written a value of + * 0x00000004 as the first step of the SDRAM contorller configuration. + */ + *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; + /* configure SDRAM start/end for detection */ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */ |