diff options
author | Bartlomiej Sieka <tur@semihalf.com> | 2007-05-27 16:58:45 +0200 |
---|---|---|
committer | Bartlomiej Sieka <tur@semihalf.com> | 2007-05-27 16:58:45 +0200 |
commit | c00125e07c1ebc125bab40e1e18bceed8be0c162 (patch) | |
tree | 5c6261640564551bf822181ace842a3147e45025 /board/motionpro/motionpro.c | |
parent | 93b78f534a6e708b4cf1a4ffb4d8438c67a007db (diff) | |
download | u-boot-imx-c00125e07c1ebc125bab40e1e18bceed8be0c162.zip u-boot-imx-c00125e07c1ebc125bab40e1e18bceed8be0c162.tar.gz u-boot-imx-c00125e07c1ebc125bab40e1e18bceed8be0c162.tar.bz2 |
MPC5XXX, Motion-PRO: Fix PHY initialization problem.
After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which
networking does not function. This commit switches PHY to TX mode by clearing
the FX_SEL bit of Mode Control Register. It also reverses commit
008861a2f3ef2c062744d733787c7e530a1b8761, i.e., a temporary workaround.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Diffstat (limited to 'board/motionpro/motionpro.c')
-rw-r--r-- | board/motionpro/motionpro.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index 1729ae7..b05e2ab 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -28,7 +28,7 @@ #include <common.h> #include <mpc5xxx.h> - +#include <miiphy.h> #if defined(CONFIG_OF_FLAT_TREE) #include <ft_build.h> #endif @@ -82,6 +82,22 @@ int board_early_init_r(void) } +/* + * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(), + * PHY goes into FX mode. To take it out of the FX mode and switch into + * desired TX operation, one needs to clear the FX_SEL bit of Mode Control + * Register. + */ +void reset_phy(void) +{ + unsigned short mode_control; + + miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control); + miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, + mode_control & 0xfffe); + return; +} + #ifndef CFG_RAMBOOT /* * Helper function to initialize SDRAM controller. |