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authorJon Loeliger <jdl@freescale.com>2006-08-09 13:36:54 -0500
committerJon Loeliger <jdl@freescale.com>2006-08-09 13:36:54 -0500
commit281f69ede28cd3d8be5d62a96b5a0b73e6065858 (patch)
tree8f1a0f42ce7d9c66d0ff2ecf93c9b069cbc68cc0 /board/mcc200
parent870cbeaa45ccdbd6566882741da9f82433bd4a86 (diff)
parent6587f7e1e98bfcb7910a47bae2eb51e9a5fbd4da (diff)
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Merge branch 'wd'
Diffstat (limited to 'board/mcc200')
-rw-r--r--board/mcc200/config.mk10
-rw-r--r--board/mcc200/mcc200.c17
-rw-r--r--board/mcc200/mt48lc16m32s2-75.h43
3 files changed, 63 insertions, 7 deletions
diff --git a/board/mcc200/config.mk b/board/mcc200/config.mk
index fa55673..a822559 100644
--- a/board/mcc200/config.mk
+++ b/board/mcc200/config.mk
@@ -26,16 +26,18 @@
#
# Valid values for TEXT_BASE are:
#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFE000000 boot low
+# 0xFC000000 boot low (standard configuration)
+# 0xFFF00000 boot high
# 0x00100000 boot from RAM (for testing only)
#
sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
+## Standard: boot low
+TEXT_BASE = 0xFC000000
+## Boot high
+# TEXT_BASE = 0xFFF00000
## For testing: boot from RAM
# TEXT_BASE = 0x00100000
endif
diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c
index 5fe239f..167dc0f 100644
--- a/board/mcc200/mcc200.c
+++ b/board/mcc200/mcc200.c
@@ -28,7 +28,16 @@
#include <mpc5xxx.h>
#include <pci.h>
-#include "mt48lc8m32b2-6-7.h"
+/* Two MT48LC8M32B2 for 32 MB */
+/* #include "mt48lc8m32b2-6-7.h" */
+
+/* One MT48LC16M32S2 for 64 MB */
+/* #include "mt48lc16m32s2-75.h" */
+#if defined (CONFIG_MCC200_SDRAM)
+#include "mt48lc16m16a2-75.h"
+#else
+#include "mt46v16m16-75.h"
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -74,6 +83,8 @@ static void sdram_start (int hi_addr)
/* normal operation */
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
__asm__ volatile ("sync");
+
+ udelay(10);
}
#endif
@@ -242,8 +253,8 @@ int misc_init_r (void)
/* Unprotect the upper bank of the Flash */
*(volatile int*)MPC5XXX_CS0_CFG |= (1 << 6);
flash_protect (FLAG_PROTECT_CLEAR,
- flash_info[0].start[0],
- (flash_info[0].start[0] + flash_info[0].size) / 2 - 1,
+ flash_info[0].start[0] + flash_info[0].size / 2,
+ (flash_info[0].start[0] - 1) + flash_info[0].size,
&flash_info[0]);
*(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6);
}
diff --git a/board/mcc200/mt48lc16m32s2-75.h b/board/mcc200/mt48lc16m32s2-75.h
new file mode 100644
index 0000000..ffdf039
--- /dev/null
+++ b/board/mcc200/mt48lc16m32s2-75.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#define SDRAM_DDR 0 /* is SDR */
+
+#if defined(CONFIG_MPC5200)
+/* Settings for XLB = 132 MHz */
+#define SDRAM_MODE 0x00CD0000
+#define SDRAM_CONTROL 0x504F0000
+#define SDRAM_CONFIG1 0xD2322800
+#define SDRAM_CONFIG2 0x8AD70000
+
+#elif defined(CONFIG_MGT5100)
+/* Settings for XLB = 66 MHz */
+#define SDRAM_MODE 0x008D0000
+#define SDRAM_CONTROL 0x504F0000
+#define SDRAM_CONFIG1 0xC2222600
+#define SDRAM_CONFIG2 0x88B70004
+#define SDRAM_ADDRSEL 0x02000000
+
+#else
+#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
+#endif