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author | Wolfgang Denk <wd@atlas.denx.de> | 2006-03-06 23:18:48 +0100 |
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committer | Wolfgang Denk <wd@atlas.denx.de> | 2006-03-06 23:18:48 +0100 |
commit | 951a954b77ef30df1f5c1b7b9b4312e783b2cbb4 (patch) | |
tree | 8f94ab1a2e15fbf31c322e6be1f750e10ac2fe2f /board/mcc200/mt48lc16m16a2-75.h | |
parent | ac7d97dcbb499c96c8182757f301dd2e09c9f49d (diff) | |
parent | bfc81252c0de3bfcf92c7c35bc04341fb33e4e4e (diff) | |
download | u-boot-imx-951a954b77ef30df1f5c1b7b9b4312e783b2cbb4.zip u-boot-imx-951a954b77ef30df1f5c1b7b9b4312e783b2cbb4.tar.gz u-boot-imx-951a954b77ef30df1f5c1b7b9b4312e783b2cbb4.tar.bz2 |
Merge with /home/wd/git/u-boot/master
Code cleanup.
Diffstat (limited to 'board/mcc200/mt48lc16m16a2-75.h')
-rw-r--r-- | board/mcc200/mt48lc16m16a2-75.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/board/mcc200/mt48lc16m16a2-75.h b/board/mcc200/mt48lc16m16a2-75.h new file mode 100644 index 0000000..ffdf039 --- /dev/null +++ b/board/mcc200/mt48lc16m16a2-75.h @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 0 /* is SDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x00CD0000 +#define SDRAM_CONTROL 0x504F0000 +#define SDRAM_CONFIG1 0xD2322800 +#define SDRAM_CONFIG2 0x8AD70000 + +#elif defined(CONFIG_MGT5100) +/* Settings for XLB = 66 MHz */ +#define SDRAM_MODE 0x008D0000 +#define SDRAM_CONTROL 0x504F0000 +#define SDRAM_CONFIG1 0xC2222600 +#define SDRAM_CONFIG2 0x88B70004 +#define SDRAM_ADDRSEL 0x02000000 + +#else +#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined +#endif |