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authorwdenk <wdenk>2002-08-17 09:36:01 +0000
committerwdenk <wdenk>2002-08-17 09:36:01 +0000
commitaffae2bff825c1a8d2cfeaf7b270188d251d39d2 (patch)
treee025ca5a84cdcd70cff986e09f89e1aaa360499c /board/mbx8xx
parentcf356ef708390102d493c53d18fd19a5963c6aa9 (diff)
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Initial revision
Diffstat (limited to 'board/mbx8xx')
-rw-r--r--board/mbx8xx/flash.c408
-rw-r--r--board/mbx8xx/vpd.c196
2 files changed, 604 insertions, 0 deletions
diff --git a/board/mbx8xx/flash.c b/board/mbx8xx/flash.c
new file mode 100644
index 0000000..e1aa47b
--- /dev/null
+++ b/board/mbx8xx/flash.c
@@ -0,0 +1,408 @@
+/*
+ * (C) Copyright 2000
+ * Marius Groeger <mgroeger@sysgo.de>
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Flash Routines for AM290[48]0B devices
+ *
+ *--------------------------------------------------------------------
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+#include "vpd.h"
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+
+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+ unsigned long size, totsize;
+ int i;
+ ulong addr;
+
+ /* Init: no FLASHes known */
+ for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ flash_info[i].flash_id = FLASH_UNKNOWN;
+ }
+
+ totsize = 0;
+ addr = 0xfc000000;
+ for(i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ size = flash_get_size((vu_long *)addr, &flash_info[i]);
+ if (flash_info[i].flash_id == FLASH_UNKNOWN)
+ break;
+ totsize += size;
+ addr += size;
+ }
+
+ addr = 0xfe000000;
+ for(i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+
+ size = flash_get_size((vu_long *)addr, &flash_info[i]);
+ if (flash_info[i].flash_id == FLASH_UNKNOWN)
+ break;
+ totsize += size;
+ addr += size;
+ }
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+ /* monitor protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_MONITOR_BASE,
+ CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+ &flash_info[0]);
+#endif
+
+ return (totsize);
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id >> 16) {
+ case 0x1:
+ printf ("AMD ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case AMD_ID_F040B:
+ printf ("AM29F040B (4 Mbit)\n");
+ break;
+ case AMD_ID_F080B:
+ printf ("AM29F080B (8 Mbit)\n");
+ break;
+ case AMD_ID_F016D:
+ printf ("AM29F016D (16 Mbit)\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i=0; i<info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s",
+ info->start[i],
+ info->protect[i] ? " (RO)" : " "
+ );
+ }
+ printf ("\n");
+ return;
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+ short i;
+ ulong vendor, devid;
+ ulong base = (ulong)addr;
+
+ /* Write auto select command: read Manufacturer ID */
+ addr[0x0555] = 0xAAAAAAAA;
+ addr[0x02AA] = 0x55555555;
+ addr[0x0555] = 0x90909090;
+
+ vendor = addr[0];
+ devid = addr[1] & 0xff;
+
+ /* only support AMD */
+ if (vendor != 0x01010101) {
+ return 0;
+ }
+
+ vendor &= 0xf;
+ devid &= 0xff;
+
+ if (devid == AMD_ID_F040B) {
+ info->flash_id = vendor << 16 | devid;
+ info->sector_count = 8;
+ info->size = info->sector_count * 0x10000;
+ }
+ else if (devid == AMD_ID_F080B) {
+ info->flash_id = vendor << 16 | devid;
+ info->sector_count = 16;
+ info->size = 4 * info->sector_count * 0x10000;
+ }
+ else if (devid == AMD_ID_F016D) {
+ info->flash_id = vendor << 16 | devid;
+ info->sector_count = 32;
+ info->size = 4 * info->sector_count * 0x10000;
+ }
+ else {
+ printf ("## Unknown Flash Type: %08lx\n", devid);
+ return 0;
+ }
+
+ /* check for protected sectors */
+ for (i = 0; i < info->sector_count; i++) {
+ /* sector base address */
+ info->start[i] = base + i * (info->size / info->sector_count);
+ /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+ /* D0 = 1 if protected */
+ addr = (volatile unsigned long *)(info->start[i]);
+ info->protect[i] = addr[2] & 1;
+ }
+
+ /*
+ * Prevent writes to uninitialized FLASH.
+ */
+ if (info->flash_id != FLASH_UNKNOWN) {
+ addr = (vu_long *)info->start[0];
+ addr[0] = 0xF0; /* reset bank */
+ }
+
+ return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+ vu_long *addr = (vu_long*)(info->start[0]);
+ int flag, prot, sect, l_sect;
+ ulong start, now, last;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+ l_sect = -1;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ addr[0x0555] = 0XAAAAAAAA;
+ addr[0x02AA] = 0x55555555;
+ addr[0x0555] = 0x80808080;
+ addr[0x0555] = 0XAAAAAAAA;
+ addr[0x02AA] = 0x55555555;
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect<=s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr = (vu_long*)(info->start[sect]);
+ addr[0] = 0x30303030;
+ l_sect = sect;
+ }
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay (1000);
+
+ /*
+ * We wait for the last triggered sector
+ */
+ if (l_sect < 0)
+ goto DONE;
+
+ start = get_timer (0);
+ last = start;
+ addr = (vu_long*)(info->start[l_sect]);
+ while ((addr[0] & 0x80808080) != 0x80808080) {
+ if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ return 1;
+ }
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ serial_putc ('.');
+ last = now;
+ }
+ }
+
+ DONE:
+ /* reset to read mode */
+ addr = (volatile unsigned long *)info->start[0];
+ addr[0] = 0xF0F0F0F0; /* reset bank */
+
+ printf (" done\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+ ulong cp, wp, data;
+ int i, l, rc;
+
+ wp = (addr & ~3); /* get lower word aligned address */
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i=0, cp=wp; i<l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *)cp);
+ }
+ for (; i<4 && cnt>0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt==0 && i<4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *)cp);
+ }
+
+ if ((rc = write_word(info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 4;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= 4) {
+ data = 0;
+ for (i=0; i<4; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_word(info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 4;
+ cnt -= 4;
+ }
+
+ if (cnt == 0) {
+ return (0);
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i<4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *)cp);
+ }
+
+ return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+ vu_long *addr = (vu_long*)(info->start[0]);
+ ulong start;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*((vu_long *)dest) & data) != data) {
+ return (2);
+ }
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ addr[0x0555] = 0xAAAAAAAA;
+ addr[0x02AA] = 0x55555555;
+ addr[0x0555] = 0xA0A0A0A0;
+
+ *((vu_long *)dest) = data;
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* data polling for D7 */
+ start = get_timer (0);
+ while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ return (1);
+ }
+ }
+ return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
diff --git a/board/mbx8xx/vpd.c b/board/mbx8xx/vpd.c
new file mode 100644
index 0000000..6f88352
--- /dev/null
+++ b/board/mbx8xx/vpd.c
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2000
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Code in faintly related to linux/arch/ppc/8xx_io:
+ * MPC8xx CPM I2C interface. Copyright (c) 1999 Dan Malek (dmalek@jlc.net).
+ *
+ * This file implements functions to read the MBX's Vital Product Data
+ * (VPD). I can't use the more general i2c code in mpc8xx/... since I need
+ * the VPD at a time where there is no RAM available yet. Hence the VPD is
+ * read into a special area in the DPRAM (see config_MBX.h::CFG_DPRAMVPD).
+ *
+ * -----------------------------------------------------------------
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#ifdef CONFIG_8xx
+#include <commproc.h>
+#endif
+#include "vpd.h"
+
+/* Location of receive/transmit buffer descriptors
+ * Allocate one transmit bd and one receive bd.
+ * IIC_BD_FREE points to free bd space which we'll use as tx buffer.
+ */
+#define IIC_BD_TX1 (BD_IIC_START + 0*sizeof(cbd_t))
+#define IIC_BD_TX2 (BD_IIC_START + 1*sizeof(cbd_t))
+#define IIC_BD_RX (BD_IIC_START + 2*sizeof(cbd_t))
+#define IIC_BD_FREE (BD_IIC_START + 3*sizeof(cbd_t))
+
+/* FIXME -- replace 0x2000 with offsetof */
+#define VPD_P ((vpd_t *)(CFG_IMMR + 0x2000 + CFG_DPRAMVPD))
+
+/* transmit/receive buffers */
+#define IIC_RX_LENGTH 128
+
+#define WITH_MICROCODE_PATCH
+
+vpd_packet_t * vpd_find_packet(u_char ident)
+{
+ vpd_packet_t *packet;
+ vpd_t *vpd = VPD_P;
+
+ packet = (vpd_packet_t *)&vpd->packets;
+ while ((packet->identifier != ident) && packet->identifier != 0xFF)
+ {
+ packet = (vpd_packet_t *)((char *)packet + packet->size + 2);
+ }
+ return packet;
+}
+
+void vpd_init(void)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile cpm8xx_t *cp = &(im->im_cpm);
+ volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c);
+ volatile iic_t *iip;
+#ifdef WITH_MICROCODE_PATCH
+ ulong reloc = 0;
+#endif
+
+ iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
+
+ /*
+ * kludge: when running from flash, no microcode patch can be
+ * installed. However, the DPMEM usually contains non-zero
+ * garbage at the relocatable patch base location, so lets clear
+ * it now. This way the rest of the code can support the microcode
+ * patch dynamically.
+ */
+ if ((ulong)vpd_init & 0xff000000)
+ iip->iic_rpbase = 0;
+
+#ifdef WITH_MICROCODE_PATCH
+ /* Check for and use a microcode relocation patch. */
+ if ((reloc = iip->iic_rpbase))
+ iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
+#endif
+ /* Initialize Port B IIC pins */
+ cp->cp_pbpar |= 0x00000030;
+ cp->cp_pbdir |= 0x00000030;
+ cp->cp_pbodr |= 0x00000030;
+
+ i2c->i2c_i2mod = 0x04; /* filter clock */
+ i2c->i2c_i2add = 0x34; /* select an arbitrary (unique) address */
+ i2c->i2c_i2brg = 0x07; /* make clock run maximum slow */
+ i2c->i2c_i2cmr = 0x00; /* disable interrupts */
+ i2c->i2c_i2cer = 0x1f; /* clear events */
+ i2c->i2c_i2com = 0x01; /* configure i2c to work as master */
+
+ if (vpd_read(0xa4, (uchar*)VPD_P, VPD_EEPROM_SIZE, 0) != VPD_EEPROM_SIZE)
+ {
+ hang();
+ }
+}
+
+
+/* Read from I2C.
+ * This is a two step process. First, we send the "dummy" write
+ * to set the device offset for the read. Second, we perform
+ * the read operation.
+ */
+int vpd_read(uint iic_device, uchar *buf, int count, int offset)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile cpm8xx_t *cp = &(im->im_cpm);
+ volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c);
+ volatile iic_t *iip;
+ volatile cbd_t *tbdf1, *tbdf2, *rbdf;
+ uchar *tb;
+ uchar event;
+#ifdef WITH_MICROCODE_PATCH
+ ulong reloc = 0;
+#endif
+
+ iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
+#ifdef WITH_MICROCODE_PATCH
+ /* Check for and use a microcode relocation patch. */
+ if ((reloc = iip->iic_rpbase))
+ iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
+#endif
+ tbdf1 = (cbd_t *)&cp->cp_dpmem[IIC_BD_TX1];
+ tbdf2 = (cbd_t *)&cp->cp_dpmem[IIC_BD_TX2];
+ rbdf = (cbd_t *)&cp->cp_dpmem[IIC_BD_RX];
+
+ /* Send a "dummy write" operation. This is a write request with
+ * only the offset sent, followed by another start condition.
+ * This will ensure we start reading from the first location
+ * of the EEPROM.
+ */
+ tb = (uchar*)&cp->cp_dpmem[IIC_BD_FREE];
+ tb[0] = iic_device & 0xfe; /* device address */
+ tb[1] = offset; /* offset */
+ tbdf1->cbd_bufaddr = (uint)tb;
+ tbdf1->cbd_datlen = 2;
+ tbdf1->cbd_sc = 0x8400;
+
+ tb += 2;
+ tb[0] = iic_device | 1; /* device address */
+ tbdf2->cbd_bufaddr = (uint)tb;
+ tbdf2->cbd_datlen = count+1;
+ tbdf2->cbd_sc = 0xbc00;
+
+ rbdf->cbd_bufaddr = (uint)buf;
+ rbdf->cbd_datlen = 0;
+ rbdf->cbd_sc = 0xb000;
+
+ iip->iic_tbase = IIC_BD_TX1;
+ iip->iic_tbptr = IIC_BD_TX1;
+ iip->iic_rbase = IIC_BD_RX;
+ iip->iic_rbptr = IIC_BD_RX;
+ iip->iic_rfcr = 0x15;
+ iip->iic_tfcr = 0x15;
+ iip->iic_mrblr = count;
+ iip->iic_rstate = 0;
+ iip->iic_tstate = 0;
+
+ i2c->i2c_i2cer = 0x1f; /* clear event mask */
+ i2c->i2c_i2mod |= 1; /* enable iic operation */
+ i2c->i2c_i2com |= 0x80; /* start master */
+
+ /* wait for IIC transfer */
+ do {
+ __asm__ volatile ("eieio");
+ event = i2c->i2c_i2cer;
+ } while (event == 0);
+
+ if ((event & 0x10) || (event & 0x04)) {
+ count = -1;
+ goto bailout;
+ }
+
+bailout:
+ i2c->i2c_i2mod &= ~1; /* turn off iic operation */
+ i2c->i2c_i2cer = 0x1f; /* clear event mask */
+
+ return count;
+}