summaryrefslogtreecommitdiff
path: root/board/lwmon5
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2008-04-29 13:36:51 +0200
committerStefan Roese <sr@denx.de>2008-04-29 13:36:51 +0200
commit135846d6ecaad255ad28d93ebbb78b3d5da68cdc (patch)
tree7db40be2fc1bf1a03c00c177596da86aec918207 /board/lwmon5
parenteea5a743a2193ef2a05b9bc6dc447ba241416f35 (diff)
downloadu-boot-imx-135846d6ecaad255ad28d93ebbb78b3d5da68cdc.zip
u-boot-imx-135846d6ecaad255ad28d93ebbb78b3d5da68cdc.tar.gz
u-boot-imx-135846d6ecaad255ad28d93ebbb78b3d5da68cdc.tar.bz2
ppc4xx: Change ECC initialization on lwmon5 to use clean_dcache_range()
As it seems the "old" ECC initialization routine by using dflush() didn't write all lines in the dcache back to memory on lwmon5. This could lead to ECC error upon Linux booting. This patch changes the program_ecc() routine to now use clean_dcache_range() instead of dflush(). clean_dcache_range() uses dcbst which is exactly what we want in this case. Since dflush() is known is cause problems, this routine will be removed completely and replaced by clean_dcache_range() with an additional patch. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/lwmon5')
-rw-r--r--board/lwmon5/sdram.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/board/lwmon5/sdram.c b/board/lwmon5/sdram.c
index 7c3cf49..36b5100 100644
--- a/board/lwmon5/sdram.c
+++ b/board/lwmon5/sdram.c
@@ -34,6 +34,7 @@
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/io.h>
+#include <asm/cache.h>
#include <ppc440.h>
#include <watchdog.h>
@@ -59,7 +60,6 @@
extern int denali_wait_for_dlllock(void);
extern void denali_core_search_data_eye(void);
extern void dcbz_area(u32 start_address, u32 num_bytes);
-extern void dflush(void);
static u32 is_ecc_enabled(void)
{
@@ -106,6 +106,7 @@ static void program_ecc(u32 start_address,
{
u32 val;
u32 current_addr = start_address;
+ u32 size;
int bytes_remaining;
sync();
@@ -123,12 +124,18 @@ static void program_ecc(u32 start_address,
* watchdog.
*/
while (bytes_remaining > 0) {
- dcbz_area(current_addr, min((64 << 20), bytes_remaining));
+ size = min((64 << 20), bytes_remaining);
+
+ /* Write zero's to SDRAM */
+ dcbz_area(current_addr, size);
+
+ /* Write modified dcache lines back to memory */
+ clean_dcache_range(current_addr, current_addr + size);
+
current_addr += 64 << 20;
bytes_remaining -= 64 << 20;
WATCHDOG_RESET();
}
- dflush();
sync();
wait_ddr_idle();