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authorStefan Roese <sr@denx.de>2010-09-11 09:31:43 +0200
committerStefan Roese <sr@denx.de>2010-09-23 09:02:05 +0200
commit5e7abce99163a00b8d267cc8045f06b498728288 (patch)
tree33da20a6f8524f7a8929cc4f8c003708a5f0a6e8 /board/lwmon5/lwmon5.c
parent098877628888f28f321b8a61a9b0b982a969e415 (diff)
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ppc4xx: Big header cleanup, mostly PPC440 related
This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/lwmon5/lwmon5.c')
-rw-r--r--board/lwmon5/lwmon5.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index 0c6f4e5..9622b70 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -38,8 +38,8 @@ int board_early_init_f(void)
u32 reg;
/* PLB Write pipelining disabled. Denali Core workaround */
- mtdcr(PLB0_ACR, 0xDE000000);
- mtdcr(PLB1_ACR, 0xDE000000);
+ mtdcr(PLB4A0_ACR, 0xDE000000);
+ mtdcr(PLB4A1_ACR, 0xDE000000);
/*--------------------------------------------------------------------
* Setup the interrupt controller polarities, triggers, etc.
@@ -249,8 +249,8 @@ int misc_init_r(void)
* This fix will make the MAL burst disabling patch for the Linux
* EMAC driver obsolete.
*/
- reg = mfdcr(PLB4_ACR) & ~PLB4_ACR_WRP;
- mtdcr(PLB4_ACR, reg);
+ reg = mfdcr(PLB4A0_ACR) & ~PLB4Ax_ACR_WRP_MASK;
+ mtdcr(PLB4A0_ACR, reg);
/*
* Init matrix keyboard