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authorWolfgang Grandegger <wg@grandegger.com>2008-06-05 13:02:29 +0200
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-06-10 18:22:26 -0500
commita75a57ef6e4b613c81434971e96ed70cf9ec9ba0 (patch)
tree22d096483fa0373540b251fd1e6e4261ab7f27a5 /board/lpd7a40x
parent6beecfbb542992eede5831240cd58678274683a9 (diff)
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NAND FSL UPM: driver re-write using the hwcontrol callback
This is a re-write of the NAND FSL UPM driver using the more universal hwcontrol callback (instead of the cmdfunc callback). Here is a brief list of furher modifications: - For the time being, the UPM setup writing the UPM array has been removed from the driver and must now be done by the board specific code. - The bus width definition in "struct fsl_upm_nand" is now in bits to comply with the corresponding Linux driver and 8, 16 and 32 bit accesses are supported. - chip->dev_read is only set if fun->dev_ready != NULL, which is required for boards not connecting the R/B pin. - A few issue have been fixed with MxMR bit manipulation like in the corresponding Linux driver. Note: I think the "io_addr" field of "struct fsl_upm" could be removed as well, because the address is already determined by "nand->IO_ADDR_[RW]", but I'm not 100% sure. This patch has been tested on a TQM8548 modules with the NAND chip Micron MT29F8G08FABWP. This patch is based on the following patches posted to this list a few minutes ago: PPC: add accessor macros to clear and set bits in one shot 83xx/85xx/86xx: add more MxMR local bus definitions Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
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