diff options
| author | Nishanth Menon <nm@ti.com> | 2014-04-08 09:50:52 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-04-17 17:24:39 -0400 |
| commit | c2800b162bdf9ffa74bbff793bd7beb5bd903773 (patch) | |
| tree | fe19f85988c4da104ba2ee0c11b559aae0f06944 /board/logicpd/zoom1/zoom1.h | |
| parent | ae3248a3fdb262b6e1d62d0602a008c46089b842 (diff) | |
| download | u-boot-imx-c2800b162bdf9ffa74bbff793bd7beb5bd903773.zip u-boot-imx-c2800b162bdf9ffa74bbff793bd7beb5bd903773.tar.gz u-boot-imx-c2800b162bdf9ffa74bbff793bd7beb5bd903773.tar.bz2 | |
OMAP3: zoom1: Configure GPMC for Ethernet
zoom1 uses LAN9211 configured over GPMC Chip Select 1.
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'board/logicpd/zoom1/zoom1.h')
| -rw-r--r-- | board/logicpd/zoom1/zoom1.h | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/board/logicpd/zoom1/zoom1.h b/board/logicpd/zoom1/zoom1.h index 62ef94f..3a943df 100644 --- a/board/logicpd/zoom1/zoom1.h +++ b/board/logicpd/zoom1/zoom1.h @@ -17,6 +17,13 @@ const omap3_sysinfo sysinfo = { "NAND", }; +#define ZOOM1_ENET_GPMC_CONF1 0x00611000 +#define ZOOM1_ENET_GPMC_CONF2 0x001F1F01 +#define ZOOM1_ENET_GPMC_CONF3 0x00080803 +#define ZOOM1_ENET_GPMC_CONF4 0x1D091D09 +#define ZOOM1_ENET_GPMC_CONF5 0x041D1F1F +#define ZOOM1_ENET_GPMC_CONF6 0x1D0904C4 + /* * IEN - Input Enable * IDIS - Input Disable @@ -94,13 +101,13 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /*GPMC_nCS1*/\ - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /*GPMC_nCS2*/\ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /*GPMC_nCS3*/\ - MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /*GPMC_nCS4*/\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /*GPMC_nCS5*/\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | DIS | M7)) /*GPMC_nCS2*/\ + MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | DIS | M4)) /*GPMC_nCS3 -> GPIO54*/\ + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | DIS | M4)) /*GPMC_nCS4 -> GPIO 55*/\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M4)) /*GPMC_nCS5 -> GPIO 56*/\ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /*GPMC_nCS6*/\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /*GPMC_nCS7*/\ + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M1)) /*GPMC_nCS7 -> GPMC_IO_DIR*/\ MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ |