summaryrefslogtreecommitdiff
path: root/board/lart
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2009-07-28 15:12:04 +0200
committerStefan Roese <sr@denx.de>2009-07-30 07:22:18 +0200
commit82a7edc7ea8f5fe55fed4ff7e127469569e539c4 (patch)
tree08cb20519dbeb40c12ba06531412655966106fb6 /board/lart
parent27dd5f8e1062684f1ba685760409d9b2ab6691bf (diff)
downloadu-boot-imx-82a7edc7ea8f5fe55fed4ff7e127469569e539c4.zip
u-boot-imx-82a7edc7ea8f5fe55fed4ff7e127469569e539c4.tar.gz
u-boot-imx-82a7edc7ea8f5fe55fed4ff7e127469569e539c4.tar.bz2
ppc4xx: Canyonlands-NAND-boot: Support 2 Crucial 512MByte SODIMM's
Some Canyonlands boards are equipped with different SODIMM's. This is no problem with the "normal" NOR booting Canyonlands U-Boot, since it automatically detects the SODIMM's via SPD data and correctly configures them. But the NAND booting version is different. Here we only have 4k of image size to completely setup the hardware, including DDR2 setup. So we need to use a fixed DDR2 setup here. This doesn't work for different SODIMM's right now. Currently only this Crucial SODIMM is support: CT6464AC667.8FB (dual ranked) Now some boards are shipped with this SODIMM: CT6464AC667.4FE (single ranked) This patch now supports both SODIMM's by configuring first for the dual ranked DIMM. A quick shows, if this module is really installed. If this test fails, the DDR2 controller is re-configured for the single ranked SODIMM. Tested with those SODIMM's: CT6464AC667.8FB (dual ranked) CT6464AC667.4FE (single ranked) Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/lart')
0 files changed, 0 insertions, 0 deletions