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| author | Mike Nuss <mike@terascala.com> | 2008-02-20 11:54:20 -0500 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-03-27 10:38:54 +0100 |
| commit | f66e2c8b25c04b79e5fb385bc8989c2de7f63991 (patch) | |
| tree | 7b55a6e9338e7b616cf228417557c441ac79b4c5 /board/lantec | |
| parent | 6fb4b640562a10daff0dbe537638d511b5b48650 (diff) | |
| download | u-boot-imx-f66e2c8b25c04b79e5fb385bc8989c2de7f63991.zip u-boot-imx-f66e2c8b25c04b79e5fb385bc8989c2de7f63991.tar.gz u-boot-imx-f66e2c8b25c04b79e5fb385bc8989c2de7f63991.tar.bz2 | |
ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.
Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/lantec')
0 files changed, 0 insertions, 0 deletions