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authorLarry Johnson <lrj@arlinx.com>2007-10-27 12:48:15 -0400
committerStefan Roese <sr@denx.de>2007-12-27 19:35:33 +0100
commita724a9b40c7fbeb6ade193ca52321b441eaecb4e (patch)
treea3a4724c6d0aa340586400d3e563e0684c83c167 /board/lantec
parent454a6cf8d498f70d2b3e18f07837603eb24b12d4 (diff)
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Fix/enhance ECC POST for 440EPx/GRx
This patch allows the ECC POST to be used for different boards with the PPC440 Denali SDRAM controller. Modifications include skipping the test if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization to prevent timing errors. Signed-off-by: Larry Johnson <lrj@acm.org>
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