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authorMarkus Klotzbuecher <mk@denx.de>2008-10-21 09:18:01 +0200
committerMarkus Klotzbuecher <mk@denx.de>2008-10-21 09:18:01 +0200
commit50bd0057ba8fceeb48533f8b1a652ccd0e170838 (patch)
treeea1a183343573c2a48248923b96d316c0956727c /board/kup
parent9dbc366744960013965fce8851035b6141f3b3ae (diff)
parentf82642e33899766892499b163e60560fbbf87773 (diff)
downloadu-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.zip
u-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.tar.gz
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Merge git://git.denx.de/u-boot into x1
Conflicts: drivers/usb/usb_ohci.c
Diffstat (limited to 'board/kup')
-rw-r--r--board/kup/common/flash.c26
-rw-r--r--board/kup/common/kup.c6
-rw-r--r--board/kup/common/load_sernum_ethaddr.c16
-rw-r--r--board/kup/common/pcmcia.c20
-rw-r--r--board/kup/kup4k/kup4k.c24
-rw-r--r--board/kup/kup4x/kup4x.c24
6 files changed, 58 insertions, 58 deletions
diff --git a/board/kup/common/flash.c b/board/kup/common/flash.c
index 7688ce2..134a9d5 100644
--- a/board/kup/common/flash.c
+++ b/board/kup/common/flash.c
@@ -25,12 +25,12 @@
#include <mpc8xx.h>
#ifndef CONFIG_ENV_ADDR
-#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
#endif
#define CONFIG_FLASH_16BIT
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
@@ -43,13 +43,13 @@ static int write_word (flash_info_t *info, ulong dest, ulong data);
unsigned long flash_init (void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0;
int i;
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
@@ -64,17 +64,17 @@ unsigned long flash_init (void)
/* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16;
+ memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
+ memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16;
/* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
+ size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
@@ -325,7 +325,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
#else
while ((sect_addr[0] & 0x00800080) != 0x00800080) {
#endif
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -467,7 +467,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
/* data polling for D7 */
start = get_timer (0);
while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
@@ -507,7 +507,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
#endif
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/kup/common/kup.c b/board/kup/common/kup.c
index d018e3c..fec5407 100644
--- a/board/kup/common/kup.c
+++ b/board/kup/common/kup.c
@@ -27,7 +27,7 @@
int misc_init_f (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile sysconf8xx_t *siu = &immap->im_siu_conf;
while (siu->sc_sipend & 0x20000000) {
@@ -47,7 +47,7 @@ int misc_init_f (void)
#ifdef CONFIG_IDE_LED
void ide_led (uchar led, uchar status)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
/* We have one led for both pcmcia slots */
if (status) { /* led on */
@@ -60,7 +60,7 @@ void ide_led (uchar led, uchar status)
void poweron_key (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
immap->im_ioport.iop_pcpar &= ~(PC_SWITCH1);
immap->im_ioport.iop_pcdir &= ~(PC_SWITCH1);
diff --git a/board/kup/common/load_sernum_ethaddr.c b/board/kup/common/load_sernum_ethaddr.c
index b7b7499..741e9a5 100644
--- a/board/kup/common/load_sernum_ethaddr.c
+++ b/board/kup/common/load_sernum_ethaddr.c
@@ -33,8 +33,8 @@
* The KUP Hardware Information Block is defined as
* follows:
* - located in first flash bank
- * - starts at offset CFG_HWINFO_OFFSET
- * - size CFG_HWINFO_SIZE
+ * - starts at offset CONFIG_SYS_HWINFO_OFFSET
+ * - size CONFIG_SYS_HWINFO_SIZE
*
* Internal structure:
* - sequence of ASCII character lines
@@ -55,15 +55,15 @@ void load_sernum_ethaddr (void)
{
unsigned char *hwi;
char *var;
- unsigned char hwi_stack[CFG_HWINFO_SIZE];
+ unsigned char hwi_stack[CONFIG_SYS_HWINFO_SIZE];
char *p;
- hwi = (unsigned char *) (CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
- if (*((unsigned long *) hwi) != (unsigned long) CFG_HWINFO_MAGIC) {
+ hwi = (unsigned char *) (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_HWINFO_OFFSET);
+ if (*((unsigned long *) hwi) != (unsigned long) CONFIG_SYS_HWINFO_MAGIC) {
printf ("HardwareInfo not found!\n");
return;
}
- memcpy (hwi_stack, hwi, CFG_HWINFO_SIZE);
+ memcpy (hwi_stack, hwi, CONFIG_SYS_HWINFO_SIZE);
/*
** ethaddr
@@ -72,7 +72,7 @@ void load_sernum_ethaddr (void)
if (var) {
var += sizeof (ETHADDR_TOKEN) - 1;
p = strchr (var, '\r');
- if ((unsigned char *)p < hwi + CFG_HWINFO_SIZE) {
+ if ((unsigned char *)p < hwi + CONFIG_SYS_HWINFO_SIZE) {
*p = '\0';
setenv ("ethaddr", var);
*p = '\r';
@@ -85,7 +85,7 @@ void load_sernum_ethaddr (void)
if (var) {
var += sizeof (LCD_TOKEN) - 1;
p = strchr (var, '\r');
- if ((unsigned char *)p < hwi + CFG_HWINFO_SIZE) {
+ if ((unsigned char *)p < hwi + CONFIG_SYS_HWINFO_SIZE) {
*p = '\0';
setenv ("lcd", var);
*p = '\r';
diff --git a/board/kup/common/pcmcia.c b/board/kup/common/pcmcia.c
index 8f0cf17..ce6b186 100644
--- a/board/kup/common/pcmcia.c
+++ b/board/kup/common/pcmcia.c
@@ -30,10 +30,10 @@ int pcmcia_hardware_enable(int slot)
udelay(10000);
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ sysp = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf));
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
/*
* Configure SIUMCR to enable PCMCIA port B
@@ -125,9 +125,9 @@ int pcmcia_hardware_disable(int slot)
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
/* remove all power */
if (slot)
@@ -162,9 +162,9 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp)
if (!slot) /* Slot A is not configurable */
return 0;
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
+ immap = (immap_t *)CONFIG_SYS_IMMR;
+ pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
+ cp = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
/*
* Disable PCMCIA buffers (isolate the interface)
diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c
index 66d6180..df3ffb4 100644
--- a/board/kup/kup4k/kup4k.c
+++ b/board/kup/kup4k/kup4k.c
@@ -119,7 +119,7 @@ const uint sdram_table[] = {
int checkboard (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
uchar *latch,rev,mod;
/*
@@ -139,7 +139,7 @@ int checkboard (void)
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size_b0 = 0;
long int size_b1 = 0;
@@ -154,7 +154,7 @@ phys_size_t initdram (int board_type)
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
memctl->memc_mar = 0x00000088;
@@ -163,14 +163,14 @@ phys_size_t initdram (int board_type)
* preliminary addresses - these have to be modified after the
* SDRAM size has been determined.
*/
-/* memctl->memc_or1 = CFG_OR1_PRELIM; */
-/* memctl->memc_br1 = CFG_BR1_PRELIM; */
+/* memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; */
+/* memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; */
-/* memctl->memc_or2 = CFG_OR2_PRELIM; */
-/* memctl->memc_br2 = CFG_BR2_PRELIM; */
+/* memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; */
+/* memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; */
- memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
+ memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
udelay (200);
@@ -204,7 +204,7 @@ phys_size_t initdram (int board_type)
size_b0 = 0x00800000;
size_b1 = 0x00800000;
size_b2 = 0x00800000;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
udelay (1000);
memctl->memc_or1 = 0xFF800A00;
memctl->memc_br1 = 0x00000081;
@@ -216,7 +216,7 @@ phys_size_t initdram (int board_type)
size_b0 = 0x01000000;
size_b1 = 0x01000000;
size_b2 = 0x01000000;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
udelay (1000);
memctl->memc_or1 = 0xFF000A00;
memctl->memc_br1 = 0x00000081;
@@ -236,7 +236,7 @@ phys_size_t initdram (int board_type)
int misc_init_r (void)
{
#ifdef CONFIG_STATUS_LED
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
#endif
#ifdef CONFIG_KUP4K_LOGO
bd_t *bd = gd->bd;
@@ -263,7 +263,7 @@ void lcd_logo (bd_t * bd)
FB_INFO_S1D13xxx fb_info;
S1D_INDEX s1dReg;
S1D_VALUE s1dValue;
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl;
ushort i;
uchar *fb;
diff --git a/board/kup/kup4x/kup4x.c b/board/kup/kup4x/kup4x.c
index f07ef18..c5b742d 100644
--- a/board/kup/kup4x/kup4x.c
+++ b/board/kup/kup4x/kup4x.c
@@ -114,7 +114,7 @@ const uint sdram_table[] = {
int checkboard (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile uchar *latch;
uchar rev, mod;
@@ -136,7 +136,7 @@ int checkboard (void)
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size_b0 = 0;
long int size_b1 = 0;
@@ -151,7 +151,7 @@ phys_size_t initdram (int board_type)
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
memctl->memc_mar = 0x00000088;
@@ -160,13 +160,13 @@ phys_size_t initdram (int board_type)
* preliminary addresses - these have to be modified after the
* SDRAM size has been determined.
*/
-/* memctl->memc_or1 = CFG_OR1_PRELIM; */
-/* memctl->memc_br1 = CFG_BR1_PRELIM; */
+/* memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; */
+/* memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; */
-/* memctl->memc_or2 = CFG_OR2_PRELIM; */
-/* memctl->memc_br2 = CFG_BR2_PRELIM; */
+/* memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; */
+/* memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; */
- memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
+ memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
udelay (200);
@@ -207,7 +207,7 @@ phys_size_t initdram (int board_type)
size_b1 = 0x00800000;
size_b2 = 0x00800000;
size_b3 = 0x00800000;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
udelay (1000);
memctl->memc_or1 = 0xFF800A00;
memctl->memc_br1 = 0x00000081;
@@ -222,7 +222,7 @@ phys_size_t initdram (int board_type)
size_b1 = 0x01000000;
size_b2 = 0x01000000;
size_b3 = 0x01000000;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
udelay (1000);
memctl->memc_or1 = 0xFF000A00;
memctl->memc_br1 = 0x00000081;
@@ -251,7 +251,7 @@ phys_size_t initdram (int board_type)
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile long int *addr;
ulong cnt, val;
@@ -294,7 +294,7 @@ static long int dram_size (long int mamr_value, long int *base,
int misc_init_r (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
#ifdef CONFIG_IDE_LED
/* Configure PA8 as output port */