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authorWolfgang Denk <wd@denx.de>2010-04-24 21:16:57 +0200
committerWolfgang Denk <wd@denx.de>2010-04-24 21:16:57 +0200
commita77034a8dfc7942ca08483138dccdebeacc36826 (patch)
treececf2628651fb6fafd22ac7b9d6cd3f3770df2b6 /board/korat
parent500fbae2043532275e09a8666d837d052c9bad9a (diff)
parentcf6eb6da433179674571f9370566b1ec8989a41a (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Diffstat (limited to 'board/korat')
-rw-r--r--board/korat/init.S22
1 files changed, 11 insertions, 11 deletions
diff --git a/board/korat/init.S b/board/korat/init.S
index c725bbb..bfc6bc1 100644
--- a/board/korat/init.S
+++ b/board/korat/init.S
@@ -43,7 +43,7 @@ tlbtab:
* BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
* speed up boot process. It is patched after relocation to enable SA_I
*/
- tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_R|AC_W|AC_X|SA_G )
+ tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_RWX | SA_G )
/*
* TLB entries for SDRAM are not needed on this platform. They are
@@ -53,37 +53,37 @@ tlbtab:
#ifdef CONFIG_SYS_INIT_RAM_DCACHE
/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0,
- AC_R|AC_W|AC_X|SA_G )
+ AC_RWX | SA_G )
#endif
/* TLB-entry for PCI Memory */
tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x00000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_R|AC_W|SA_G|SA_I )
+ CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_RW | SA_IG )
tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x10000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_R|AC_W|SA_G|SA_I )
+ CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_RW | SA_IG )
tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x20000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_R|AC_W|SA_G|SA_I )
+ CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_RW | SA_IG )
tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x30000000, SZ_256M,
- CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_R|AC_W|SA_G|SA_I )
+ CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_RW | SA_IG )
/* TLB-entry for EBC */
- tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RW | SA_IG )
/* TLB-entry for Internal Registers & OCM */
/* I wonder why this must be executable -- lrj@acm.org 2007-10-08 */
- tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_R|AC_W|AC_X|SA_I )
+ tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_RWX | SA_I )
/*TLB-entry PCI registers*/
- tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RW | SA_IG )
/* TLB-entry for peripherals */
- tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|SA_G|SA_I)
+ tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RW | SA_IG)
/* TLB-entry PCI IO Space - from sr@denx.de */
- tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RW | SA_IG)
tlbtab_end