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author | Thomas Herzmann <thomas.herzmann@keymile.com> | 2012-05-04 10:55:56 +0200 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2012-06-15 17:12:51 -0500 |
commit | 95209b66846276d1d598f579ae2dcd1988c49a53 (patch) | |
tree | 8f4b741256841516be0025c8229b56c78c4d3a13 /board/keymile/km83xx | |
parent | 5758dd7633aead9ee4d0f453cef51f2acd3df3dc (diff) | |
download | u-boot-imx-95209b66846276d1d598f579ae2dcd1988c49a53.zip u-boot-imx-95209b66846276d1d598f579ae2dcd1988c49a53.tar.gz u-boot-imx-95209b66846276d1d598f579ae2dcd1988c49a53.tar.bz2 |
powerpc/83xx: configure CONFIG_POST for kmcoge5ne
kmcoge5ne starts the post tests if the testpin on
the board was enabled. Currently it does simply a memory
test.
Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/keymile/km83xx')
-rw-r--r-- | board/keymile/km83xx/km83xx.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index a889750..f05cdfd 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -27,6 +27,7 @@ #include <asm/processor.h> #include <pci.h> #include <libfdt.h> +#include <post.h> #include "../common/common.h" @@ -288,3 +289,39 @@ int hush_init_var(void) return 0; } #endif + +#if defined(CONFIG_POST) +int post_hotkeys_pressed(void) +{ + int testpin = 0; + struct km_bec_fpga *base = + (struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE; + int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG); + testpin = (testpin_reg & CONFIG_TESTPIN_MASK) != 0; + debug("post_hotkeys_pressed: %d\n", !testpin); + return testpin; +} + +ulong post_word_load(void) +{ + void* addr = (ulong *) (CPM_POST_WORD_ADDR); + debug("post_word_load 0x%08lX: 0x%08X\n", (ulong)addr, in_le32(addr)); + return in_le32(addr); + +} +void post_word_store(ulong value) +{ + void* addr = (ulong *) (CPM_POST_WORD_ADDR); + debug("post_word_store 0x%08lX: 0x%08lX\n", (ulong)addr, value); + out_le32(addr, value); +} + +int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset) +{ + *vstart = CONFIG_SYS_MEMTEST_START; + *size = CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START; + debug("arch_memory_test_prepare 0x%08X 0x%08X\n", *vstart, *size); + + return 0; +} +#endif |