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authorJohn Rigby <jcrigby@gmail.com>2010-01-25 23:12:58 -0700
committerTom Rix <Tom.Rix@windriver.com>2010-03-07 12:36:36 -0600
commit6895d4510a7758595b85b48a7f449bd61dfc812f (patch)
tree7b3423467a075bb68e78eee05c59034cd30f542a /board/karo
parent740d6ae5b982496fcea0666b2207cb34cc0e6015 (diff)
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Add support for KARO TX25 board
This is an i.MX25 base board with only NAND so it uses nand_spl to boot. Signed-off-by: John Rigby <jcrigby@gmail.com> Tune configuration, add support for (redundant) environment in NAND. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
Diffstat (limited to 'board/karo')
-rw-r--r--board/karo/tx25/Makefile51
-rw-r--r--board/karo/tx25/config.mk5
-rw-r--r--board/karo/tx25/lowlevel_init.S131
-rw-r--r--board/karo/tx25/tx25.c176
4 files changed, 363 insertions, 0 deletions
diff --git a/board/karo/tx25/Makefile b/board/karo/tx25/Makefile
new file mode 100644
index 0000000..b0e610f
--- /dev/null
+++ b/board/karo/tx25/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2009 DENX Software Engineering
+# Author: John Rigby <jcrigby@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := tx25.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+
diff --git a/board/karo/tx25/config.mk b/board/karo/tx25/config.mk
new file mode 100644
index 0000000..732a14a
--- /dev/null
+++ b/board/karo/tx25/config.mk
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+TEXT_BASE = 0x81ec0000
+else
+TEXT_BASE = 0x81f00000
+endif
diff --git a/board/karo/tx25/lowlevel_init.S b/board/karo/tx25/lowlevel_init.S
new file mode 100644
index 0000000..823df10
--- /dev/null
+++ b/board/karo/tx25/lowlevel_init.S
@@ -0,0 +1,131 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * Based on U-Boot and RedBoot sources for several different i.mx
+ * platforms.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/macro.h>
+
+.macro init_aips
+ write32 0x43f00000, 0x77777777
+ write32 0x43f00004, 0x77777777
+ write32 0x43f00000, 0x77777777
+ write32 0x53f00004, 0x77777777
+.endm
+
+.macro init_max
+ write32 0x43f04000, 0x43210
+ write32 0x43f04100, 0x43210
+ write32 0x43f04200, 0x43210
+ write32 0x43f04300, 0x43210
+ write32 0x43f04400, 0x43210
+
+ write32 0x43f04010, 0x10
+ write32 0x43f04110, 0x10
+ write32 0x43f04210, 0x10
+ write32 0x43f04310, 0x10
+ write32 0x43f04410, 0x10
+
+ write32 0x43f04800, 0x0
+ write32 0x43f04900, 0x0
+ write32 0x43f04a00, 0x0
+ write32 0x43f04b00, 0x0
+ write32 0x43f04c00, 0x0
+.endm
+
+.macro init_m3if
+ write32 0xb8003000, 0x1
+.endm
+
+.macro init_clocks
+ /*
+ * clocks
+ *
+ * first enable CLKO debug output
+ * 0x40000000 enables the debug CLKO signal
+ * 0x05000000 sets CLKO divider to 6
+ * 0x00600000 makes CLKO parent clk the USB clk
+ */
+ write32 0x53f80064, 0x45600000
+ write32 0x53f80008, 0x20034000
+
+ /*
+ * enable all implemented clocks in all three
+ * clock control registers
+ */
+ write32 0x53f8000c, 0x1fffffff
+ write32 0x53f80010, 0xffffffff
+ write32 0x53f80014, 0xfdfff
+.endm
+
+.macro init_ddrtype
+ /*
+ * ddr_type is 3.3v SDRAM
+ */
+ write32 0x43fac454, 0x800
+.endm
+
+/*
+ * sdram controller init
+ */
+.macro init_sdram_bank bankaddr, ctl, cfg
+ ldr r0, =0xb8001000
+ ldr r2, =\bankaddr
+ /*
+ * reset SDRAM controller
+ * then wait for initialization to complete
+ */
+ ldr r1, =(1 << 1)
+ str r1, [r0, #0x10]
+1: ldr r3, [r0, #0x10]
+ tst r3, #(1 << 31)
+ beq 1b
+
+ ldr r1, =0x95728
+ str r1, [r0, #\cfg] /* config */
+
+ ldr r1, =0x92116480 /* control | precharge */
+ str r1, [r0, #\ctl] /* write command to controller */
+ str r1, [r2, #0x400] /* command encoded in address */
+
+ ldr r1, =0xa2116480 /* auto refresh */
+ str r1, [r0, #\ctl]
+ ldrb r3, [r2] /* read dram twice to auto refresh */
+ ldrb r3, [r2]
+
+ ldr r1, =0xb2116480 /* control | load mode */
+ str r1, [r0, #\ctl] /* write command to controller */
+ strb r1, [r2, #0x33] /* command encoded in address */
+
+ ldr r1, =0x82116480 /* control | normal (0)*/
+ str r1, [r0, #\ctl] /* write command to controller */
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+ init_aips
+ init_max
+ init_m3if
+ init_clocks
+
+ init_sdram_bank 0x80000000, 0x0, 0x4
+
+ init_sdram_bank 0x90000000, 0x8, 0xc
+ mov pc, lr
diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c
new file mode 100644
index 0000000..4d6a96d
--- /dev/null
+++ b/board/karo/tx25/tx25.c
@@ -0,0 +1,176 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * Based on imx27lite.c:
+ * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
+ * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
+ * And:
+ * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/imx25-pinmux.h>
+
+static void mdelay(int n)
+{
+ while (n-- > 0)
+ udelay(1000);
+}
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FEC_MXC
+void tx25_fec_init(void)
+{
+ struct iomuxc_mux_ctl *muxctl;
+ struct iomuxc_pad_ctl *padctl;
+ u32 val;
+ u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+ struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE;
+ struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE;
+ u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
+
+ debug("tx25_fec_init\n");
+ /*
+ * fec pin init is generic
+ */
+ mx25_fec_init_pins();
+
+ /*
+ * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
+ *
+ * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
+ * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
+ */
+ muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+ padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+ writel(gpio_mux_mode, &muxctl->pad_d13);
+ writel(gpio_mux_mode, &muxctl->pad_d11);
+
+ writel(0x0, &padctl->pad_d13);
+ writel(0x0, &padctl->pad_d11);
+
+ /* drop PHY power and assert reset (low) */
+ val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9));
+ writel(val, &gpio4->dr);
+ val = readl(&gpio4->dir) | (1 << 7) | (1 << 9);
+ writel(val, &gpio4->dir);
+
+ mdelay(5);
+
+ debug("resetting phy\n");
+
+ /* turn on PHY power leaving reset asserted */
+ val = readl(&gpio4->dr) | 1 << 9;
+ writel(val, &gpio4->dr);
+
+ mdelay(10);
+
+ /*
+ * Setup some strapping pins that are latched by the PHY
+ * as reset goes high.
+ *
+ * Set PHY mode to 111
+ * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
+ * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
+ * mode2 is tied high so nothing to do
+ *
+ * Turn on RMII mode
+ * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
+ */
+ /*
+ * save three current mux modes and set each to gpio mode
+ */
+ saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
+ saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
+ saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
+
+ writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
+ writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
+ writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
+
+ /*
+ * set each to 1 and make each an output
+ */
+ val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12);
+ writel(val, &gpio3->dr);
+ val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12);
+ writel(val, &gpio3->dir);
+
+ mdelay(22); /* this value came from RedBoot */
+
+ /*
+ * deassert PHY reset
+ */
+ val = readl(&gpio4->dr) | 1 << 7;
+ writel(val, &gpio4->dr);
+ writel(val, &gpio4->dr);
+
+ mdelay(5);
+
+ /*
+ * set FEC pins back
+ */
+ writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
+ writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
+ writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
+}
+#else
+#define tx25_fec_init()
+#endif
+
+int board_init()
+{
+#ifdef CONFIG_MXC_UART
+ extern void mx25_uart_init_pins(void);
+
+ mx25_uart_init_pins();
+#endif
+ return 0;
+}
+
+int board_late_init(void)
+{
+ tx25_fec_init();
+ return 0;
+}
+
+int dram_init (void)
+{
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+#if CONFIG_NR_DRAM_BANKS > 1
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
+ PHYS_SDRAM_2_SIZE);
+#endif
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ printf("KARO TX25\n");
+ return 0;
+}