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| author | Stefan Roese <sr@denx.de> | 2009-09-24 09:55:50 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-09-28 10:45:42 +0200 |
| commit | 952e7760bfc5b0e3b142b9ce34e7fbb7d008c900 (patch) | |
| tree | abd867c1a44dbc20bbd970c36c76f0355adc6df4 /board/jse/jse.c | |
| parent | 984f10baac8ef6032df52f135943d6b0bc96f724 (diff) | |
| download | u-boot-imx-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.zip u-boot-imx-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.tar.gz u-boot-imx-952e7760bfc5b0e3b142b9ce34e7fbb7d008c900.tar.bz2 | |
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/jse/jse.c')
| -rw-r--r-- | board/jse/jse.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/jse/jse.c b/board/jse/jse.c index 6dc9a01..1849ca4 100644 --- a/board/jse/jse.c +++ b/board/jse/jse.c @@ -48,12 +48,12 @@ int board_early_init_f (void) | IRQ 30 (EXT IRQ 5) SystemACE BRdy (unused) | IRQ 31 (EXT IRQ 6) (unused) +-------------------------------------------------------------------------*/ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr (uicer, 0x00000000); /* disable all ints */ - mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ - mtdcr (uicpr, 0xFFFFFF87); /* set int polarities */ - mtdcr (uictr, 0x10000000); /* set int trigger levels */ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0ER, 0x00000000); /* disable all ints */ + mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */ + mtdcr (UIC0PR, 0xFFFFFF87); /* set int polarities */ + mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ /* Configure the interface to the SystemACE MCU port. The SystemACE is fast, but there is no reason to have |