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authorStefan Roese <sr@denx.de>2008-10-21 11:43:08 +0200
committerStefan Roese <sr@denx.de>2008-10-21 11:43:08 +0200
commitf61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch)
treeab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/ixdp425/ixdp425.c
parentec081c2c190148b374e86a795fb6b1c49caeb549 (diff)
parentf82642e33899766892499b163e60560fbbf87773 (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/ixdp425/ixdp425.c')
-rw-r--r--board/ixdp425/ixdp425.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c
index b379c75..43ac8f6 100644
--- a/board/ixdp425/ixdp425.c
+++ b/board/ixdp425/ixdp425.c
@@ -54,25 +54,25 @@ int board_init (void)
/*
* Get realtek RTL8305 switch and SLIC out of reset
*/
- GPIO_OUTPUT_SET(CFG_GPIO_SWITCH_RESET_N);
- GPIO_OUTPUT_ENABLE(CFG_GPIO_SWITCH_RESET_N);
- GPIO_OUTPUT_SET(CFG_GPIO_SLIC_RESET_N);
- GPIO_OUTPUT_ENABLE(CFG_GPIO_SLIC_RESET_N);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N);
/*
* Setup GPIO's for PCI INTA & INTB
*/
- GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA_N);
- GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA_N);
- GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB_N);
- GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB_N);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N);
/*
* Setup GPIO's for 33MHz clock output
*/
*IXP425_GPIO_GPCLKR = 0x01FF01FF;
- GPIO_OUTPUT_ENABLE(CFG_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CFG_GPIO_EXTBUS_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
#endif
return 0;