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| author | Wolfgang Denk <wd@castor.denx.de> | 2006-05-30 15:56:48 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@castor.denx.de> | 2006-05-30 15:56:48 +0200 |
| commit | ba94a1bba3600d387edba7eb451990d9891e1c2f (patch) | |
| tree | e84f737ac88e15342b4cab23c9e631987e8ee75e /board/ixdp425/ixdp425.c | |
| parent | 5770a1e488621a9e7e344afed7c921ff4e715a63 (diff) | |
| download | u-boot-imx-ba94a1bba3600d387edba7eb451990d9891e1c2f.zip u-boot-imx-ba94a1bba3600d387edba7eb451990d9891e1c2f.tar.gz u-boot-imx-ba94a1bba3600d387edba7eb451990d9891e1c2f.tar.bz2 | |
* Update Intel IXP4xx support
- Add IXP4xx NPE ethernet MAC support
- Add support for Intel IXDPG425 board
- Add support for Prodrive PDNB3 board
- Add IRQ support
Patch by Stefan Roese, 23 May 2006
[This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still
sufferes from licensing issues. Blame Intel.]
Diffstat (limited to 'board/ixdp425/ixdp425.c')
| -rw-r--r-- | board/ixdp425/ixdp425.c | 66 |
1 files changed, 57 insertions, 9 deletions
diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c index aa96591..eaf7cde 100644 --- a/board/ixdp425/ixdp425.c +++ b/board/ixdp425/ixdp425.c @@ -1,4 +1,7 @@ /* + * (C) Copyright 2006 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * * (C) Copyright 2002 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net * @@ -25,24 +28,21 @@ * MA 02111-1307 USA */ -#include <asm/arch/ixp425.h> #include <common.h> +#include <command.h> +#include <malloc.h> +#include <asm/arch/ixp425.h> DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations */ - -/**********************************************************/ - int board_post_init (void) { return (0); } -/**********************************************************/ - int board_init (void) { /* arch number of IXDP */ @@ -51,10 +51,58 @@ int board_init (void) /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; +#ifdef CONFIG_IXDPG425 + /* arch number of IXDP */ + gd->bd->bi_arch_number = MACH_TYPE_IXDPG425; + + /* + * Get realtek RTL8305 switch and SLIC out of reset + */ + GPIO_OUTPUT_SET(CFG_GPIO_SWITCH_RESET_N); + GPIO_OUTPUT_ENABLE(CFG_GPIO_SWITCH_RESET_N); + GPIO_OUTPUT_SET(CFG_GPIO_SLIC_RESET_N); + GPIO_OUTPUT_ENABLE(CFG_GPIO_SLIC_RESET_N); + + /* + * Setup GPIO's for PCI INTA & INTB + */ + GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA_N); + GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA_N); + GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB_N); + GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB_N); + + /* + * Setup GPIO's for 33MHz clock output + */ + *IXP425_GPIO_GPCLKR = 0x01FF01FF; + GPIO_OUTPUT_ENABLE(CFG_GPIO_PCI_CLK); + GPIO_OUTPUT_ENABLE(CFG_GPIO_EXTBUS_CLK); +#endif + return 0; } -/**********************************************************/ +/* + * Check Board Identity + */ +int checkboard(void) +{ + char *s = getenv("serial#"); + +#ifdef CONFIG_IXDPG425 + puts("Board: IXDPG425 - Intel Network Gateway Reference Platform"); +#else + puts("Board: IXDP425 - Intel Development Platform"); +#endif + + if (s != NULL) { + puts(", serial# "); + puts(s); + } + putc('\n'); + + return (0); +} int dram_init (void) { @@ -64,8 +112,7 @@ int dram_init (void) return (0); } -/**********************************************************/ - +#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined(CONFIG_PCI) extern struct pci_controller hose; extern void pci_ixp_init(struct pci_controller * hose); @@ -75,3 +122,4 @@ void pci_init_board(void) pci_ixp_init(&hose); } +#endif |