rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

2 files changed, 20 insertions, 20 deletions

diff --git a/board/iphase4539/flash.c b/board/iphase4539/flash.c
index 098dcc2..3dfee1f 100644
--- a/board/iphase4539/flash.c
+++ b/board/iphase4539/flash.c
@@ -31,7 +31,7 @@
 #include <flash.h>
 #include <asm/io.h>
 
-flash_info_t	flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 
 extern int hwc_flash_size(void);
 static ulong flash_get_size (u32 addr, flash_info_t *info);
@@ -52,26 +52,26 @@ unsigned long flash_init (void)
 	unsigned int bank = 0;
 
 	/* Init: no FLASHes known */
-	for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
+	for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
 		flash_info[i].flash_id = FLASH_UNKNOWN;
 		flash_info[i].sector_count = 0;
 		flash_info[i].size = 0;
 	}
 
 	/* Initialise the BOOT Flash */
-	if (bank == CFG_MAX_FLASH_BANKS) {
+	if (bank == CONFIG_SYS_MAX_FLASH_BANKS) {
 		puts ("Warning: not all Flashes are initialised !");
 		return flash_size;
 	}
 
-	bank_size = flash_get_size (CFG_FLASH_BASE, flash_info + bank);
+	bank_size = flash_get_size (CONFIG_SYS_FLASH_BASE, flash_info + bank);
 	if (bank_size) {
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE && \
-    CFG_MONITOR_BASE < CFG_FLASH_BASE + CFG_MAX_FLASH_SIZE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE && \
+    CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MAX_FLASH_SIZE
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
-			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE + monitor_flash_len - 1,
+			      CONFIG_SYS_MONITOR_BASE,
+			      CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
 			      flash_info + bank);
 #endif
 
@@ -85,8 +85,8 @@ unsigned long flash_init (void)
 
 		/* HWC protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
-			      CFG_FLASH_BASE,
-			      CFG_FLASH_BASE + 0x10000 - 1,
+			      CONFIG_SYS_FLASH_BASE,
+			      CONFIG_SYS_FLASH_BASE + 0x10000 - 1,
 			      flash_info + bank);
 
 		flash_size += bank_size;
@@ -144,10 +144,10 @@ static ulong flash_get_size (u32 addr, flash_info_t *info)
 	case AMD_ID_LV033C:
 		info->flash_id += FLASH_AM033C;
 		info->size = hwc_flash_size();
-		if (info->size > CFG_MAX_FLASH_SIZE) {
+		if (info->size > CONFIG_SYS_MAX_FLASH_SIZE) {
 			printf("U-Boot supports only %d MB\n",
-			       CFG_MAX_FLASH_SIZE);
-			info->size = CFG_MAX_FLASH_SIZE;
+			       CONFIG_SYS_MAX_FLASH_SIZE);
+			info->size = CONFIG_SYS_MAX_FLASH_SIZE;
 		}
 		info->sector_count = info->size / 0x10000;
 		break;				/* => 4 MB		*/
@@ -281,7 +281,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
 	last  = start;
 	addr = info->start[l_sect];
 	while ((in8(addr) & 0x80) != 0x80) {
-		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
 			printf ("Timeout\n");
 			return 1;
 		}
@@ -421,7 +421,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
 	/* data polling for D7 */
 	start = get_timer (0);
 	while ((in32(dest) & 0x80808080) != (data & 0x80808080)) {
-		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
 			return (1);
 		}
 		iobarrier_rw();
diff --git a/board/iphase4539/iphase4539.c b/board/iphase4539/iphase4539.c
index e5d0254..7fec2cc 100644
--- a/board/iphase4539/iphase4539.c
+++ b/board/iphase4539/iphase4539.c
@@ -195,16 +195,16 @@ const iop_conf_t iop_conf_tab[4][32] = {
 
 phys_size_t initdram (int board_type)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 	volatile uchar *base;
 	ulong maxsize;
 	int i;
 
-	memctl->memc_psrt = CFG_PSRT;
-	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_psrt = CONFIG_SYS_PSRT;
+	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
 	immap->im_siu_conf.sc_ppc_acr = 0x00000026;
 	immap->im_siu_conf.sc_ppc_alrh = 0x01276345;
 	immap->im_siu_conf.sc_ppc_alrl = 0x89ABCDEF;
@@ -217,7 +217,7 @@ phys_size_t initdram (int board_type)
 	/* Init Main SDRAM */
 #define OP_VALUE   0x404A241A
 #define OP_VALUE_M (OP_VALUE & 0x87FFFFFF);
-	base = (uchar *) CFG_SDRAM_BASE;
+	base = (uchar *) CONFIG_SYS_SDRAM_BASE;
 	memctl->memc_psdmr = 0x28000000 | OP_VALUE_M;
 	*base = 0xFF;
 	memctl->memc_psdmr = 0x08000000 | OP_VALUE_M;