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| author | Alexey Brodkin <Alexey.Brodkin@synopsys.com> | 2014-03-21 16:57:47 +0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-03-28 15:06:30 -0400 |
| commit | 17b0da801910b2791cf67817735a3367615922e6 (patch) | |
| tree | 980ceceb167839653780e2b2ff31283734970145 /board/iomega | |
| parent | a7b26dbb49139535992c6d4c282bcf258b3f7fa3 (diff) | |
| download | u-boot-imx-17b0da801910b2791cf67817735a3367615922e6.zip u-boot-imx-17b0da801910b2791cf67817735a3367615922e6.tar.gz u-boot-imx-17b0da801910b2791cf67817735a3367615922e6.tar.bz2 | |
axs101: flush DMA buffer descriptors before DMA transactons starts
CPU sets DMA buffer descriptors with data required for inetrnal DMA such as:
* Ownership of BD
* Buffer size
* Pointer to data buffer in memory
Then we need to make sure DMA engine of NAND controller gets proper data.
For this we flush buffer rescriptor.
Then we're ready for DMA transaction.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/iomega')
0 files changed, 0 insertions, 0 deletions