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author | Simon Glass <sjg@chromium.org> | 2015-01-27 22:13:47 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2015-02-06 12:07:39 -0700 |
commit | 3a1a18ff1867d6f94921a24992354d3a547666d6 (patch) | |
tree | c3501a0edb1d3e92cf863c8f7b31bd32b0586878 /board/intel/minnowmax | |
parent | 00bdd95278e189131f9b5858045c540bf0cce530 (diff) | |
download | u-boot-imx-3a1a18ff1867d6f94921a24992354d3a547666d6.zip u-boot-imx-3a1a18ff1867d6f94921a24992354d3a547666d6.tar.gz u-boot-imx-3a1a18ff1867d6f94921a24992354d3a547666d6.tar.bz2 |
x86: Add support for Intel Minnowboard Max
This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.
This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).
Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'board/intel/minnowmax')
-rw-r--r-- | board/intel/minnowmax/Kconfig | 24 | ||||
-rw-r--r-- | board/intel/minnowmax/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/intel/minnowmax/Makefile | 7 | ||||
-rw-r--r-- | board/intel/minnowmax/minnowmax.c | 32 | ||||
-rw-r--r-- | board/intel/minnowmax/start.S | 9 |
5 files changed, 78 insertions, 0 deletions
diff --git a/board/intel/minnowmax/Kconfig b/board/intel/minnowmax/Kconfig new file mode 100644 index 0000000..43c50a5 --- /dev/null +++ b/board/intel/minnowmax/Kconfig @@ -0,0 +1,24 @@ +if TARGET_MINNOWMAX + +config SYS_BOARD + default "minnowmax" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "baytrail" + +config SYS_CONFIG_NAME + default "minnowmax" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_RESET_VECTOR + select INTEL_BAYTRAIL + select BOARD_ROMSIZE_KB_8192 + +config PCIE_ECAM_BASE + default 0xe0000000 + +endif diff --git a/board/intel/minnowmax/MAINTAINERS b/board/intel/minnowmax/MAINTAINERS new file mode 100644 index 0000000..d655761 --- /dev/null +++ b/board/intel/minnowmax/MAINTAINERS @@ -0,0 +1,6 @@ +CircuitCo Minnowboard Max +M: Simon Glass <sjg@chromium.org> +S: Maintained +F: board/intel/minnowmax +F: include/configs/minnowmax.h +F: configs/minnowmax_defconfig diff --git a/board/intel/minnowmax/Makefile b/board/intel/minnowmax/Makefile new file mode 100644 index 0000000..1a61432 --- /dev/null +++ b/board/intel/minnowmax/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2015, Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += minnowmax.o start.o diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c new file mode 100644 index 0000000..6e82b16 --- /dev/null +++ b/board/intel/minnowmax/minnowmax.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2015, Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/ibmpc.h> +#include <asm/pnp_def.h> +#include <netdev.h> +#include <smsc_lpc47m.h> + +#define SERIAL_DEV PNP_DEV(0x2e, 4) + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + lpc47m_enable_serial(SERIAL_DEV, UART0_BASE); + + return 0; +} + +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) +{ + return; +} + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/board/intel/minnowmax/start.S b/board/intel/minnowmax/start.S new file mode 100644 index 0000000..2c941a4 --- /dev/null +++ b/board/intel/minnowmax/start.S @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2015, Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.globl early_board_init +early_board_init: + jmp early_board_init_ret |