diff options
| author | Detlev Zundel <dzu@denx.de> | 2009-03-30 00:31:35 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-03-30 09:41:58 +0200 |
| commit | e979e85fd39b06436922bb4d6bb5fafcbc775182 (patch) | |
| tree | a5da6591805a58d17a9117810305eff7f01195dd /board/inka4x0/inka4x0.c | |
| parent | 7b5611cdd12ca0cc33f994f0d4a4454788fc3124 (diff) | |
| download | u-boot-imx-e979e85fd39b06436922bb4d6bb5fafcbc775182.zip u-boot-imx-e979e85fd39b06436922bb4d6bb5fafcbc775182.tar.gz u-boot-imx-e979e85fd39b06436922bb4d6bb5fafcbc775182.tar.bz2 | |
inka4x0: Add hardware diagnosis and RTC in configuration.
This patch adds the board specific communication routines needed by
the external 4543 RTC.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Andreas Pfefferle <ap@denx.de>
Diffstat (limited to 'board/inka4x0/inka4x0.c')
| -rw-r--r-- | board/inka4x0/inka4x0.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c index bb5c25d..a8bc3b3 100644 --- a/board/inka4x0/inka4x0.c +++ b/board/inka4x0/inka4x0.c @@ -33,6 +33,7 @@ * MA 02111-1307 USA */ +#include <asm/io.h> #include <common.h> #include <mpc5xxx.h> #include <pci.h> @@ -189,6 +190,8 @@ int misc_init_r (void) { int misc_init_f (void) { + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + struct mpc5xxx_wu_gpio *wu_gpio = (struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO; char tmp[10]; int i, br; @@ -236,6 +239,23 @@ int misc_init_f (void) *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9; *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC3_9; *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC3_9; + + /* + * Configure three wire serial interface to RTC (PSC1_4, + * PSC2_4, PSC3_4, PSC3_5) + */ + setbits_8(&wu_gpio->enable, MPC5XXX_GPIO_WKUP_PSC1_4 | + MPC5XXX_GPIO_WKUP_PSC2_4); + setbits_8(&wu_gpio->ddr, MPC5XXX_GPIO_WKUP_PSC1_4 | + MPC5XXX_GPIO_WKUP_PSC2_4); + clrbits_8(&wu_gpio->dvo, MPC5XXX_GPIO_WKUP_PSC1_4); + clrbits_8(&gpio->sint_inten, MPC5XXX_GPIO_SINT_PSC3_4 | + MPC5XXX_GPIO_SINT_PSC3_5); + setbits_8(&gpio->sint_gpioe, MPC5XXX_GPIO_SINT_PSC3_4 | + MPC5XXX_GPIO_SINT_PSC3_5); + setbits_8(&gpio->sint_ddr, MPC5XXX_GPIO_SINT_PSC3_5); + clrbits_8(&gpio->sint_dvo, MPC5XXX_GPIO_SINT_PSC3_5); + return 0; } |