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authorWolfgang Denk <wd@pollux.(none)>2005-12-04 00:40:34 +0100
committerWolfgang Denk <wd@pollux.(none)>2005-12-04 00:40:34 +0100
commitf013dacf0a90667fbefe35580f8031a84caeb65e (patch)
tree7e6f5ecf1ce7d800c13b0342ba10d67486c52636 /board/incaip
parentc75eba3b4140187cd0d9bd8049f5df4c49b6889b (diff)
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Code cleanup, especially MIPS for GCC 4.x
Diffstat (limited to 'board/incaip')
-rw-r--r--board/incaip/flash.c2
-rw-r--r--board/incaip/incaip.c2
-rw-r--r--board/incaip/lowlevel_init.S9
3 files changed, 8 insertions, 5 deletions
diff --git a/board/incaip/flash.c b/board/incaip/flash.c
index 686f2e9..520514d 100644
--- a/board/incaip/flash.c
+++ b/board/incaip/flash.c
@@ -190,7 +190,7 @@ void flash_print_info (flash_info_t *info)
int i;
uchar *boottype;
uchar *bootletter;
- uchar *fmt;
+ char *fmt;
uchar botbootletter[] = "B";
uchar topbootletter[] = "T";
uchar botboottype[] = "bottom boot sector";
diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c
index eb6eaea..b5d9e00 100644
--- a/board/incaip/incaip.c
+++ b/board/incaip/incaip.c
@@ -68,7 +68,7 @@ long int initdram(int board_type)
{
*INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
(rows << 4) | cols;
- size = get_ram_size((ulong *)CFG_SDRAM_BASE,
+ size = get_ram_size((long *)CFG_SDRAM_BASE,
max_sdram_size());
if (size > max_size)
diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S
index fb64ef4..14d738a 100644
--- a/board/incaip/lowlevel_init.S
+++ b/board/incaip/lowlevel_init.S
@@ -66,6 +66,7 @@
.globl ebu_init
.ent ebu_init
ebu_init:
+__ebu_init:
li t1, EBU_MODUL_BASE
li t2, 0xA0000041
@@ -118,6 +119,7 @@ ebu_init:
.globl cgu_init
.ent cgu_init
cgu_init:
+__cgu_init:
li t1, CGU_MODUL_BASE
@@ -182,6 +184,7 @@ cgu_init:
.globl sdram_init
.ent sdram_init
sdram_init:
+__sdram_init:
li t1, MC_MODUL_BASE
@@ -281,11 +284,11 @@ lowlevel_init:
/* We rely on the fact that neither ebu_init() nor cgu_init() nor sdram_init()
* modify t0 and a0.
*/
- bal cgu_init
+ bal __cgu_init
nop
- bal ebu_init
+ bal __ebu_init
nop
- bal sdram_init
+ bal __sdram_init
nop
move ra, t0