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authorTom Rini <trini@ti.com>2013-11-11 09:40:34 -0500
committerTom Rini <trini@ti.com>2013-11-11 09:40:34 -0500
commit60390d70be7336b2441f5f69bd4f5affa83d064d (patch)
tree857824f8b7f5f7aaf2f5dac91eea94392818a7a0 /board/imgtec/malta/superio.c
parent85b8c5c4bf80025de4632ae6c9a8a606e51508a4 (diff)
parenta3e80904fb07cda792e636704e3b3950d1446af3 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mips
Diffstat (limited to 'board/imgtec/malta/superio.c')
-rw-r--r--board/imgtec/malta/superio.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/board/imgtec/malta/superio.c b/board/imgtec/malta/superio.c
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+++ b/board/imgtec/malta/superio.c
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+/*
+ * Copyright (C) 2013 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * Setup code for the FDC37M817 super I/O controller
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define SIO_CONF_PORT 0x3f0
+#define SIO_DATA_PORT 0x3f1
+
+enum sio_conf_key {
+ SIOCONF_DEVNUM = 0x07,
+ SIOCONF_ACTIVATE = 0x30,
+ SIOCONF_ENTER_SETUP = 0x55,
+ SIOCONF_BASE_HIGH = 0x60,
+ SIOCONF_BASE_LOW = 0x61,
+ SIOCONF_PRIMARY_INT = 0x70,
+ SIOCONF_EXIT_SETUP = 0xaa,
+ SIOCONF_MODE = 0xf0,
+};
+
+static struct {
+ u8 key;
+ u8 data;
+} sio_config[] = {
+ /* tty0 */
+ { SIOCONF_DEVNUM, 0x04 },
+ { SIOCONF_BASE_HIGH, 0x03 },
+ { SIOCONF_BASE_LOW, 0xf8 },
+ { SIOCONF_MODE, 0x02 },
+ { SIOCONF_PRIMARY_INT, 0x04 },
+ { SIOCONF_ACTIVATE, 0x01 },
+
+ /* tty1 */
+ { SIOCONF_DEVNUM, 0x05 },
+ { SIOCONF_BASE_HIGH, 0x02 },
+ { SIOCONF_BASE_LOW, 0xf8 },
+ { SIOCONF_MODE, 0x02 },
+ { SIOCONF_PRIMARY_INT, 0x03 },
+ { SIOCONF_ACTIVATE, 0x01 },
+};
+
+void malta_superio_init(void *io_base)
+{
+ unsigned i;
+
+ /* enter config state */
+ writeb(SIOCONF_ENTER_SETUP, io_base + SIO_CONF_PORT);
+
+ /* configure peripherals */
+ for (i = 0; i < ARRAY_SIZE(sio_config); i++) {
+ writeb(sio_config[i].key, io_base + SIO_CONF_PORT);
+ writeb(sio_config[i].data, io_base + SIO_DATA_PORT);
+ }
+
+ /* exit config state */
+ writeb(SIOCONF_EXIT_SETUP, io_base + SIO_CONF_PORT);
+}