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author | Markus Klotzbuecher <mk@denx.de> | 2006-03-24 15:43:16 +0100 |
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committer | Markus Klotzbücher <mk@pollux.denx.de> | 2006-03-24 15:43:16 +0100 |
commit | 2770bcb21c82835a5351176e5b2a9221d7fc8ef9 (patch) | |
tree | 78edf9afc584e1a76d219bd64d260224a84f0d10 /board/icecube/mt46v32m16.h | |
parent | 0b953ffc653fc5ab3d3fa47abf0dd9b8bd0703f5 (diff) | |
parent | 05d8dce9d07cf4073ea15fbc448c1ce22b6baf0f (diff) | |
download | u-boot-imx-2770bcb21c82835a5351176e5b2a9221d7fc8ef9.zip u-boot-imx-2770bcb21c82835a5351176e5b2a9221d7fc8ef9.tar.gz u-boot-imx-2770bcb21c82835a5351176e5b2a9221d7fc8ef9.tar.bz2 |
Merge with http://www.denx.de/git/u-boot.git
Diffstat (limited to 'board/icecube/mt46v32m16.h')
-rw-r--r-- | board/icecube/mt46v32m16.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/board/icecube/mt46v32m16.h b/board/icecube/mt46v32m16.h new file mode 100644 index 0000000..de2b48b --- /dev/null +++ b/board/icecube/mt46v32m16.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 1 /* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x704f0f00 +#define SDRAM_CONFIG1 0x73722930 +#define SDRAM_CONFIG2 0x47770000 +#define SDRAM_TAPDELAY 0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif |