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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/hymod/hymod.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/hymod/hymod.c')
| -rw-r--r-- | board/hymod/hymod.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/board/hymod/hymod.c b/board/hymod/hymod.c index 91aaab1..2af3049 100644 --- a/board/hymod/hymod.c +++ b/board/hymod/hymod.c @@ -255,7 +255,7 @@ uchar fs6377_regs[16] = { int board_postclk_init (void) { - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); /* * Initialise the FS6377 clock chip @@ -347,16 +347,16 @@ uint upmc_table[] = { int misc_init_f (void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; printf ("UPMs: "); upmconfig (UPMB, upmb_table, sizeof upmb_table / sizeof upmb_table[0]); - memctl->memc_mbmr = CFG_MBMR; + memctl->memc_mbmr = CONFIG_SYS_MBMR; upmconfig (UPMC, upmc_table, sizeof upmc_table / sizeof upmc_table[0]); - memctl->memc_mcmr = CFG_MCMR; + memctl->memc_mcmr = CONFIG_SYS_MCMR; printf ("configured\n"); return (0); @@ -367,10 +367,10 @@ misc_init_f (void) phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; - volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8); - ulong psdmr = CFG_PSDMR; + volatile uchar c = 0, *ramaddr = (uchar *) (CONFIG_SYS_SDRAM_BASE + 0x8); + ulong psdmr = CONFIG_SYS_PSDMR; int i; /* @@ -390,11 +390,11 @@ initdram (int board_type) * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_psrt = CONFIG_SYS_PSRT; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = c; @@ -409,7 +409,7 @@ initdram (int board_type) memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; *ramaddr = c; - return (CFG_SDRAM_SIZE << 20); + return (CONFIG_SYS_SDRAM_SIZE << 20); } /* ------------------------------------------------------------------------- */ @@ -517,18 +517,18 @@ last_stage_init (void) #ifdef CONFIG_SHOW_ACTIVITY void board_show_activity (ulong timebase) { -#ifdef CFG_HYMOD_DBLEDS - volatile immap_t *immr = (immap_t *) CFG_IMMR; +#ifdef CONFIG_SYS_HYMOD_DBLEDS + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; volatile iop8260_t *iop = &immr->im_ioport; static int shift = 0; - if ((timestamp % CFG_HZ) == 0) { + if ((timestamp % CONFIG_SYS_HZ) == 0) { if (++shift > 3) shift = 0; iop->iop_pdatd = (iop->iop_pdatd & ~0x0f000000) | (1 << (24 + shift)); } -#endif /* CFG_HYMOD_DBLEDS */ +#endif /* CONFIG_SYS_HYMOD_DBLEDS */ } void show_activity(int arg) |