diff options
author | Rob Herring <rob.herring@calxeda.com> | 2011-10-24 08:50:20 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-10-27 21:56:37 +0200 |
commit | 37fc0ed268dc5acacd3a83adafa26eb1a84e90af (patch) | |
tree | 9d1a79aacd23a74dca864f8adb3008ca9911dfc8 /board/highbank/highbank.c | |
parent | cfeba45f505290ec719076dd174727d10045aa2b (diff) | |
download | u-boot-imx-37fc0ed268dc5acacd3a83adafa26eb1a84e90af.zip u-boot-imx-37fc0ed268dc5acacd3a83adafa26eb1a84e90af.tar.gz u-boot-imx-37fc0ed268dc5acacd3a83adafa26eb1a84e90af.tar.bz2 |
ARM: Add Calxeda Highbank platform
Add basic support for Calxeda Highbank platform. Only minimal support with
serial and SATA are included.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'board/highbank/highbank.c')
-rw-r--r-- | board/highbank/highbank.c | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c new file mode 100644 index 0000000..8db8a2b --- /dev/null +++ b/board/highbank/highbank.c @@ -0,0 +1,57 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <common.h> +#include <ahci.h> +#include <scsi.h> + +#include <asm/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscellaneous platform dependent initialisations + */ +int board_init(void) +{ + icache_enable(); + + return 0; +} + +int misc_init_r(void) +{ + ahci_init(0xffe08000); + scsi_scan(1); + return 0; +} + +int dram_init(void) +{ + gd->ram_size = SZ_512M; + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +} + +void reset_cpu(ulong addr) +{ +} |