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| author | Helmut Raiger <helmut.raiger@hale.at> | 2012-01-18 21:27:13 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 10:11:27 +0100 |
| commit | f353518ffb026af0ac259ae508edd9994f30d51b (patch) | |
| tree | 87eb80c6188db78f62eac3b117d963680ec76b10 /board/hale/tt01/tt01.c | |
| parent | c8eff0ff304133d97192ca2f3d438d50fd62f3c1 (diff) | |
| download | u-boot-imx-f353518ffb026af0ac259ae508edd9994f30d51b.zip u-boot-imx-f353518ffb026af0ac259ae508edd9994f30d51b.tar.gz u-boot-imx-f353518ffb026af0ac259ae508edd9994f30d51b.tar.bz2 | |
tt01: add MMC support
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Diffstat (limited to 'board/hale/tt01/tt01.c')
| -rw-r--r-- | board/hale/tt01/tt01.c | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c index 2995c8f..ed3fa6e 100644 --- a/board/hale/tt01/tt01.c +++ b/board/hale/tt01/tt01.c @@ -26,6 +26,8 @@ #include <netdev.h> #include <command.h> #include <pmic.h> +#include <fsl_pmic.h> +#include <mc13783.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> @@ -175,8 +177,6 @@ int board_init(void) int board_late_init(void) { - pmic_init(); - #ifdef CONFIG_HW_WATCHDOG mxc_hw_watchdog_enable(); #endif @@ -190,6 +190,36 @@ int checkboard(void) return 0; } +#ifdef CONFIG_MXC_MMC +int board_mmc_init(bd_t *bis) +{ + u32 val; + struct pmic *p; + + /* + * this is the first driver to use the pmic, so call + * pmic_init() here. board_late_init() is too late for + * the MMC driver. + */ + pmic_init(); + p = get_pmic(); + + /* configure pins for SDHC1 only */ + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC)); + + /* turn on power V_MMC1 */ + if (pmic_reg_read(p, REG_MODE_1, &val) < 0) + pmic_reg_write(p, REG_MODE_1, val | VMMC1EN); + + return mxc_mmc_init(bis); +} +#endif + int board_eth_init(bd_t *bis) { int rc = 0; |