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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-08-07 23:21:52 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-08-07 23:21:52 +0200 |
| commit | 98280e3d431db77d92219438b8840853bd7cb412 (patch) | |
| tree | f771fe8d5086d32cda26a0b8d16f9b95e761838e /board/gth2/lowlevel_init.S | |
| parent | 99d70e3a47affb9bae041a2caece7cd516e213b3 (diff) | |
| parent | 6587f7e1e98bfcb7910a47bae2eb51e9a5fbd4da (diff) | |
| download | u-boot-imx-98280e3d431db77d92219438b8840853bd7cb412.zip u-boot-imx-98280e3d431db77d92219438b8840853bd7cb412.tar.gz u-boot-imx-98280e3d431db77d92219438b8840853bd7cb412.tar.bz2 | |
Merge with /home/wd/git/u-boot/master
Diffstat (limited to 'board/gth2/lowlevel_init.S')
| -rw-r--r-- | board/gth2/lowlevel_init.S | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S index 62e3657..983ff70 100644 --- a/board/gth2/lowlevel_init.S +++ b/board/gth2/lowlevel_init.S @@ -197,11 +197,11 @@ noCacheJump: /* RCE2 CP Altera */ li t0, MEM_STCFG2 - li t1, 0x00000280 /* BE, EW */ + li t1, 0x00000280 /* BE, EW */ sw t1, 0(t0) li t0, MEM_STTIME2 - li t1, 0x0303000c + li t1, 0x0303000c sw t1, 0(t0) li t0, MEM_STADDR2 @@ -210,11 +210,11 @@ noCacheJump: /* RCE3 DP Altera */ li t0, MEM_STCFG3 - li t1, 0x00000280 /* BE, EW */ + li t1, 0x00000280 /* BE, EW */ sw t1, 0(t0) li t0, MEM_STTIME3 - li t1, 0x0303000c + li t1, 0x0303000c sw t1, 0(t0) li t0, MEM_STADDR3 @@ -428,14 +428,14 @@ mt0: sw t0, 0(t0) li t0, 0x80000000 li t1, 0xFFF000 /* 64 MB */ mt1: lw t2, 0(t0) - bne t0, t2, memhang + bne t0, t2, memhang add t1, -1 add t0, 4 bne t1, zero, mt1 nop nop .globl clearmem -clearmem: +clearmem: /* Clear memory */ li t0, 0x80000000 li t1, 0xFFF000 /* 64 MB */ @@ -445,10 +445,10 @@ mtc: sw zero, 0(t0) bne t1, zero, mtc nop nop -memtestend: +memtestend: j ra nop - -memhang: + +memhang: b memhang nop |