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| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:31 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:08:17 +0800 |
| commit | 9ed781a6ffba48d75b3ae0a0058ca439b8e178c2 (patch) | |
| tree | 1700cfafb872f8b307f1c547d59576b48e578d29 /board/google | |
| parent | ac643e0363b4fe32e2742ede8084fc9999bd0bfb (diff) | |
| download | u-boot-imx-9ed781a6ffba48d75b3ae0a0058ca439b8e178c2.zip u-boot-imx-9ed781a6ffba48d75b3ae0a0058ca439b8e178c2.tar.gz u-boot-imx-9ed781a6ffba48d75b3ae0a0058ca439b8e178c2.tar.bz2 | |
x86: ivybridge: Move northbridge and PCH init into drivers
Instead of calling the northbridge and PCH init from bd82x6x_init_extra()
when the PCI bus is probed, call it from the respective drivers. Also drop
the Northbridge init as it has no effect. The registers it touches appear to
be read-only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'board/google')
| -rw-r--r-- | board/google/chromebook_link/link.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/board/google/chromebook_link/link.c b/board/google/chromebook_link/link.c index 1b97a8f..d12d742 100644 --- a/board/google/chromebook_link/link.c +++ b/board/google/chromebook_link/link.c @@ -14,14 +14,6 @@ int arch_early_init_r(void) { - struct udevice *dev; - int ret; - - /* Make sure the platform controller hub is up and running */ - ret = uclass_get_device(UCLASS_PCH, 0, &dev); - if (ret) - return ret; - return 0; } |