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| author | Terry Lv <r65388@freescale.com> | 2010-01-06 15:57:26 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2010-01-06 15:57:26 +0800 |
| commit | c3b0a8706e5b3eb84875830e9acaa80cac088c14 (patch) | |
| tree | eeaea12ab02b93e65e4440700192f322e5073107 /board/gdsys/gdppc440etx | |
| parent | cb4d53ad84e809a9d6d4354db0e140803cff27a2 (diff) | |
| download | u-boot-imx-c3b0a8706e5b3eb84875830e9acaa80cac088c14.zip u-boot-imx-c3b0a8706e5b3eb84875830e9acaa80cac088c14.tar.gz u-boot-imx-c3b0a8706e5b3eb84875830e9acaa80cac088c14.tar.bz2 | |
ENGR00119834: Change PDR0 clock settings for mx35 TO2
The IPU_HND_BYP bit is different in mx35 to1 and to2.
Change the value of this bit for mx35 to2.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'board/gdsys/gdppc440etx')
0 files changed, 0 insertions, 0 deletions