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| author | Dirk Eibach <eibach@gdsys.de> | 2011-10-20 11:12:55 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2011-12-01 09:10:57 +0100 |
| commit | 255ef4d9091fe896ff152629a8cb290ee92c9fde (patch) | |
| tree | 4cd49edfd10397a89e5cab891c2ac4c461fbe350 /board/gdsys/common/miiphybb.c | |
| parent | a6569c63b368efeff262e11586319b8c8515ca00 (diff) | |
| download | u-boot-imx-255ef4d9091fe896ff152629a8cb290ee92c9fde.zip u-boot-imx-255ef4d9091fe896ff152629a8cb290ee92c9fde.tar.gz u-boot-imx-255ef4d9091fe896ff152629a8cb290ee92c9fde.tar.bz2 | |
ppc4xx: Add Io64 board support
Board support for the Guntermann & Drunck Io64.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/gdsys/common/miiphybb.c')
| -rw-r--r-- | board/gdsys/common/miiphybb.c | 58 |
1 files changed, 50 insertions, 8 deletions
diff --git a/board/gdsys/common/miiphybb.c b/board/gdsys/common/miiphybb.c index e56e966..46f1a1e 100644 --- a/board/gdsys/common/miiphybb.c +++ b/board/gdsys/common/miiphybb.c @@ -26,6 +26,11 @@ #include <asm/io.h> +struct io_bb_pinset { + int mdio; + int mdc; +}; + static int io_bb_mii_init(struct bb_miiphy_bus *bus) { return 0; @@ -33,47 +38,57 @@ static int io_bb_mii_init(struct bb_miiphy_bus *bus) static int io_bb_mdio_active(struct bb_miiphy_bus *bus) { + struct io_bb_pinset *pins = bus->priv; + out_be32((void *)GPIO0_TCR, - in_be32((void *)GPIO0_TCR) | CONFIG_SYS_MDIO_PIN); + in_be32((void *)GPIO0_TCR) | pins->mdio); return 0; } static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus) { + struct io_bb_pinset *pins = bus->priv; + out_be32((void *)GPIO0_TCR, - in_be32((void *)GPIO0_TCR) & ~CONFIG_SYS_MDIO_PIN); + in_be32((void *)GPIO0_TCR) & ~pins->mdio); return 0; } static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v) { + struct io_bb_pinset *pins = bus->priv; + if (v) out_be32((void *)GPIO0_OR, - in_be32((void *)GPIO0_OR) | CONFIG_SYS_MDIO_PIN); + in_be32((void *)GPIO0_OR) | pins->mdio); else out_be32((void *)GPIO0_OR, - in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_MDIO_PIN); + in_be32((void *)GPIO0_OR) & ~pins->mdio); return 0; } static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) { - *v = ((in_be32((void *)GPIO0_IR) & CONFIG_SYS_MDIO_PIN) != 0); + struct io_bb_pinset *pins = bus->priv; + + *v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0); return 0; } static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v) { + struct io_bb_pinset *pins = bus->priv; + if (v) out_be32((void *)GPIO0_OR, - in_be32((void *)GPIO0_OR) | CONFIG_SYS_MDC_PIN); + in_be32((void *)GPIO0_OR) | pins->mdc); else out_be32((void *)GPIO0_OR, - in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_MDC_PIN); + in_be32((void *)GPIO0_OR) & ~pins->mdc); return 0; } @@ -85,6 +100,19 @@ static int io_bb_delay(struct bb_miiphy_bus *bus) return 0; } +struct io_bb_pinset io_bb_pinsets[] = { + { + .mdio = CONFIG_SYS_MDIO_PIN, + .mdc = CONFIG_SYS_MDC_PIN, + }, +#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME + { + .mdio = CONFIG_SYS_MDIO1_PIN, + .mdc = CONFIG_SYS_MDC1_PIN, + }, +#endif +}; + struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = CONFIG_SYS_GBIT_MII_BUSNAME, @@ -95,7 +123,21 @@ struct bb_miiphy_bus bb_miiphy_buses[] = { .get_mdio = io_bb_get_mdio, .set_mdc = io_bb_set_mdc, .delay = io_bb_delay, - } + .priv = &io_bb_pinsets[0], + }, +#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME + { + .name = CONFIG_SYS_GBIT_MII1_BUSNAME, + .init = io_bb_mii_init, + .mdio_active = io_bb_mdio_active, + .mdio_tristate = io_bb_mdio_tristate, + .set_mdio = io_bb_set_mdio, + .get_mdio = io_bb_get_mdio, + .set_mdc = io_bb_set_mdc, + .delay = io_bb_delay, + .priv = &io_bb_pinsets[1], + }, +#endif }; int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / |