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| author | Dirk Eibach <eibach@gdsys.de> | 2013-06-26 16:04:26 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2013-07-25 19:35:42 +0200 |
| commit | aba27acf6711dce0ef1507f2f9f02a80d70a45da (patch) | |
| tree | f77350104f847ab46c990c7119cb705f51089a09 /board/gdsys/405ep/405ep.c | |
| parent | aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c (diff) | |
| download | u-boot-imx-aba27acf6711dce0ef1507f2f9f02a80d70a45da.zip u-boot-imx-aba27acf6711dce0ef1507f2f9f02a80d70a45da.tar.gz u-boot-imx-aba27acf6711dce0ef1507f2f9f02a80d70a45da.tar.bz2 | |
powerpc/ppc4xx: Use generic accessor functions for gdsys FPGA
A set of accessor functions was added to be able to access not only
memory mapped FPGA in a generic way.
Thanks to Wolfgang Denk for getting this sorted properly.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/gdsys/405ep/405ep.c')
| -rw-r--r-- | board/gdsys/405ep/405ep.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c index f0df2e3..426dc05 100644 --- a/board/gdsys/405ep/405ep.c +++ b/board/gdsys/405ep/405ep.c @@ -18,6 +18,12 @@ #define REFLECTION_TESTPATTERN 0xdede #define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff) +#ifdef CONFIG_SYS_FPGA_NO_RFL_HI +#define REFLECTION_TESTREG reflection_low +#else +#define REFLECTION_TESTREG reflection_high +#endif + DECLARE_GLOBAL_DATA_PTR; int get_fpga_state(unsigned dev) @@ -90,23 +96,17 @@ int board_early_init_r(void) gd405ep_set_fpga_reset(0); for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { - struct ihs_fpga *fpga = - (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k); -#ifdef CONFIG_SYS_FPGA_NO_RFL_HI - u16 *reflection_target = &fpga->reflection_low; -#else - u16 *reflection_target = &fpga->reflection_high; -#endif /* * wait for fpga out of reset */ ctr = 0; while (1) { - out_le16(&fpga->reflection_low, - REFLECTION_TESTPATTERN); + u16 val; + + FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN); - if (in_le16(reflection_target) == - REFLECTION_TESTPATTERN_INV) + FPGA_GET_REG(k, REFLECTION_TESTREG, &val); + if (val == REFLECTION_TESTPATTERN_INV) break; udelay(100000); |