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| author | Marek Vasut <marex@denx.de> | 2015-11-26 14:08:50 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-12-01 16:09:51 +0100 |
| commit | 18e02ffe5e626fe409ca9427e368c879f6ee450c (patch) | |
| tree | 4aa8fa20035f50ef705cd9940e4e108900d65cfc /board/gateworks | |
| parent | a6b1e25fc6f9ad3a392526414acb1c3c36eccd0f (diff) | |
| download | u-boot-imx-18e02ffe5e626fe409ca9427e368c879f6ee450c.zip u-boot-imx-18e02ffe5e626fe409ca9427e368c879f6ee450c.tar.gz u-boot-imx-18e02ffe5e626fe409ca9427e368c879f6ee450c.tar.bz2 | |
arm: imx6: novena, gw_ventana: Fix use of pfuze100 bit definitions
The following patch changed the PFUZE100 swbst register bit definitions
and broke PMIC configuration on multiple boards, at least on the novena
and gw_ventana. This patch fixes it.
commit 8fa46350a4c7dca7710362f6c871098557b934ad
Author: Peng Fan <Peng.Fan@freescale.com>
Date: Fri Aug 7 16:43:45 2015 +0800
power: regulator: add pfuze100 support
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tested-by: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'board/gateworks')
| -rw-r--r-- | board/gateworks/gw_ventana/common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index d406c83..a20190e 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -806,7 +806,7 @@ void setup_pmic(void) /* Set SWBST to 5.0V and enable */ pmic_reg_read(p, PFUZE100_SWBSTCON1, ®); reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); - reg |= (SWBST_5_00V | SWBST_MODE_AUTO); + reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); } } |