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author | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
commit | f61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/g2000/g2000.c | |
parent | ec081c2c190148b374e86a795fb6b1c49caeb549 (diff) | |
parent | f82642e33899766892499b163e60560fbbf87773 (diff) | |
download | u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.zip u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.gz u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/g2000/g2000.c')
-rw-r--r-- | board/g2000/g2000.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c index 647f4b7..48fc643 100644 --- a/board/g2000/g2000.c +++ b/board/g2000/g2000.c @@ -33,7 +33,7 @@ #define MEM_SDTR1_INIT_VAL 0x00854005 #define SDRAM0_CFG_ENABLE 0x80000000 -#define CFG_SDRAM_SIZE 0x04000000 /* 64 MB */ +#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */ int board_early_init_f (void) { @@ -77,8 +77,8 @@ int misc_init_r (void) /* * Set NAND-FLASH GPIO signals to default */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE); + out32(GPIO0_OR, in32(GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE)); + out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE); #endif return (0); @@ -127,7 +127,7 @@ long int init_sdram_static_settings(void) udelay(500); mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE ); - return (CFG_SDRAM_SIZE); /* CFG_SDRAM_SIZE is in G2000.h */ + return (CONFIG_SYS_SDRAM_SIZE); /* CONFIG_SYS_SDRAM_SIZE is in G2000.h */ } @@ -151,11 +151,11 @@ phys_size_t initdram (int board_type) #if defined(CONFIG_CMD_NAND) #include <linux/mtd/nand_legacy.h> -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; +extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; void nand_init(void) { - nand_probe(CFG_NAND_BASE); + nand_probe(CONFIG_SYS_NAND_BASE); if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { print_size(nand_dev_desc[0].totlen, "\n"); } |