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| author | Wolfgang Denk <wd@denx.de> | 2009-09-30 23:39:36 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-09-30 23:39:36 +0200 |
| commit | 1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67 (patch) | |
| tree | c9ddff821d53fb702957b70e96731b1aa64d11b5 /board/freescale | |
| parent | 7529b4445bc4525765b003d3269bcf37fc33fac5 (diff) | |
| parent | 24b17d8a3c3a4b9ceaf6363ebe0021011b0b8bd8 (diff) | |
| download | u-boot-imx-1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67.zip u-boot-imx-1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67.tar.gz u-boot-imx-1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mpc8536ds/config.mk | 19 | ||||
| -rw-r--r-- | board/freescale/mpc8536ds/tlb.c | 11 |
2 files changed, 30 insertions, 0 deletions
diff --git a/board/freescale/mpc8536ds/config.mk b/board/freescale/mpc8536ds/config.mk index c1d0525..e38af73 100644 --- a/board/freescale/mpc8536ds/config.mk +++ b/board/freescale/mpc8536ds/config.mk @@ -23,8 +23,27 @@ # # mpc8536ds board # +ifndef NAND_SPL +ifeq ($(CONFIG_MK_NAND), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +endif +endif + +ifeq ($(CONFIG_MK_SDCARD), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + +ifeq ($(CONFIG_MK_SPIFLASH), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + ifndef TEXT_BASE TEXT_BASE = 0xeff80000 endif +ifndef RESET_VECTOR_ADDRESS RESET_VECTOR_ADDRESS = 0xeffffffc +endif diff --git a/board/freescale/mpc8536ds/tlb.c b/board/freescale/mpc8536ds/tlb.c index 35a13d4..dc52d7f 100644 --- a/board/freescale/mpc8536ds/tlb.c +++ b/board/freescale/mpc8536ds/tlb.c @@ -71,6 +71,17 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 4, BOOKE_PAGESZ_1M, 1), + +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_256K, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000, + CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 6, BOOKE_PAGESZ_256K, 1), +#endif }; int num_tlb_entries = ARRAY_SIZE(tlb_table); |