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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2011-03-23 04:21:13 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-03-24 09:46:21 -0500 |
| commit | b0c5ceb305054aadf2f810b0b7bfcc94926b78ad (patch) | |
| tree | d284416f828560513a3ebe0fa854d67db47eeabf /board/freescale | |
| parent | eb672e92f44a5e3c1780c74ded073727d2887434 (diff) | |
| download | u-boot-imx-b0c5ceb305054aadf2f810b0b7bfcc94926b78ad.zip u-boot-imx-b0c5ceb305054aadf2f810b0b7bfcc94926b78ad.tar.gz u-boot-imx-b0c5ceb305054aadf2f810b0b7bfcc94926b78ad.tar.bz2 | |
powerpc/85xx: Fix PCI memory map setup on P1_P2_RDB
Update the PCIe address map to match standard FSL memory map.
Additionally, fix the TLBs so the cover the PCIe address space properly
so cards plugged in like an e1000 work correctly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/p1_p2_rdb/tlb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/p1_p2_rdb/tlb.c b/board/freescale/p1_p2_rdb/tlb.c index b85c268..a46b1b5 100644 --- a/board/freescale/p1_p2_rdb/tlb.c +++ b/board/freescale/p1_p2_rdb/tlb.c @@ -60,12 +60,12 @@ struct fsl_e_tlb_entry tlb_table[] = { #if defined(CONFIG_PCI) /* *I*G* - PCI */ - SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS, + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_1G, 1), /* *I*G* - PCI I/O */ - SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS, + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 4, BOOKE_PAGESZ_256K, 1), |