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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-06-10 00:25:31 +0400 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-16 22:25:43 +0200 |
| commit | c78c678354c8321737aa07e86831ff14176f4ed5 (patch) | |
| tree | 53688df6ef825425bca48c263dfbdd9141709876 /board/freescale | |
| parent | c9646ed758804fa1fa6c1425369a4eee5d618b1d (diff) | |
| download | u-boot-imx-c78c678354c8321737aa07e86831ff14176f4ed5.zip u-boot-imx-c78c678354c8321737aa07e86831ff14176f4ed5.tar.gz u-boot-imx-c78c678354c8321737aa07e86831ff14176f4ed5.tar.bz2 | |
mpc83xx: MPC837XEMDS: Fixup eSDHC nodes in device tree
fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.
Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mpc837xemds/mpc837xemds.c | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 8506892..b0289c0 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -11,6 +11,7 @@ */ #include <common.h> +#include <hwconfig.h> #include <i2c.h> #include <asm/io.h> #include <asm/fsl_serdes.h> @@ -18,12 +19,12 @@ #include <tsec.h> #include <libfdt.h> #include <fdt_support.h> +#include <fsl_esdhc.h> #include "pci.h" #include "../common/pq-mds-pib.h" int board_early_init_f(void) { - struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; u8 *bcsr = (u8 *)CONFIG_SYS_BCSR; /* Enable flash write */ @@ -31,18 +32,6 @@ int board_early_init_f(void) /* Clear all of the interrupt of BCSR */ bcsr[0xe] = 0xff; -#ifdef CONFIG_MMC - /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */ - bcsr[0xc] |= 0x4c; - - /* Set proper bits in SICR to allow SD signals through */ - clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); - - clrsetbits_be32(&im->sysconf.sicrh, (SICRH_GPIO2_E | SICRH_SPI), - (SICRH_GPIO2_E_SD | SICRH_SPI_SD)); - -#endif - #ifdef CONFIG_FSL_SERDES immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; u32 spridr = in_be32(&immr->sysconf.spridr); @@ -72,6 +61,27 @@ int board_early_init_f(void) return 0; } +#ifdef CONFIG_FSL_ESDHC +int board_mmc_init(bd_t *bd) +{ + struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; + u8 *bcsr = (u8 *)CONFIG_SYS_BCSR; + + if (!hwconfig("esdhc")) + return 0; + + /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */ + bcsr[0xc] |= 0x4c; + + /* Set proper bits in SICR to allow SD signals through */ + clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); + clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI, + SICRH_GPIO2_E_SD | SICRH_SPI_SD); + + return fsl_esdhc_mmc_init(bd); +} +#endif + #if defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2) int board_eth_init(bd_t *bd) { @@ -322,6 +332,7 @@ void ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); ft_tsec_fixup(blob, bd); fdt_fixup_dr_usb(blob, bd); + fdt_fixup_esdhc(blob, bd); #ifdef CONFIG_PCI ft_pci_setup(blob, bd); if (board_pci_host_broken()) |