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| author | Liu Yu <yu.liu@freescale.com> | 2010-01-18 19:03:28 +0800 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2010-01-27 14:22:40 -0600 |
| commit | 674ef7bd02de948b6d8757f6a43a6f2fa4d88769 (patch) | |
| tree | a50d2419ae4cfbf3f92e17974a1d662bba5b1724 /board/freescale | |
| parent | 9b208ece0a4e040774e24990b7cb6f0ad0ca4cc7 (diff) | |
| download | u-boot-imx-674ef7bd02de948b6d8757f6a43a6f2fa4d88769.zip u-boot-imx-674ef7bd02de948b6d8757f6a43a6f2fa4d88769.tar.gz u-boot-imx-674ef7bd02de948b6d8757f6a43a6f2fa4d88769.tar.bz2 | |
Nand boot: Add nand boot support for MPC8569mds board
This patch add nand boot support for MPC8569mds board.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mpc8569mds/config.mk | 9 | ||||
| -rw-r--r-- | board/freescale/mpc8569mds/tlb.c | 11 |
2 files changed, 20 insertions, 0 deletions
diff --git a/board/freescale/mpc8569mds/config.mk b/board/freescale/mpc8569mds/config.mk index 962f79b..7de0f7c 100644 --- a/board/freescale/mpc8569mds/config.mk +++ b/board/freescale/mpc8569mds/config.mk @@ -23,4 +23,13 @@ # # mpc8569mds board # +ifndef NAND_SPL +ifeq ($(CONFIG_MK_NAND), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +endif +endif + +ifndef TEXT_BASE TEXT_BASE = 0xfff80000 +endif diff --git a/board/freescale/mpc8569mds/tlb.c b/board/freescale/mpc8569mds/tlb.c index 3b8ee05..73dcc3e 100644 --- a/board/freescale/mpc8569mds/tlb.c +++ b/board/freescale/mpc8569mds/tlb.c @@ -90,6 +90,17 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 4, BOOKE_PAGESZ_64M, 1), + +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_256K, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000, + CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 6, BOOKE_PAGESZ_256K, 1), +#endif }; int num_tlb_entries = ARRAY_SIZE(tlb_table); |