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| author | Peng Fan <Peng.Fan@freescale.com> | 2014-11-10 08:50:40 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-11-14 20:58:19 +0100 |
| commit | a511a3e0e8dd48f4293096fbfb9dd7d57e89b0b4 (patch) | |
| tree | a491a699bb9076533571f4b79deaf81a56715173 /board/freescale | |
| parent | 3b9c1a5dc09e5ee773f5a4fe9280e568b64b7779 (diff) | |
| download | u-boot-imx-a511a3e0e8dd48f4293096fbfb9dd7d57e89b0b4.zip u-boot-imx-a511a3e0e8dd48f4293096fbfb9dd7d57e89b0b4.tar.gz u-boot-imx-a511a3e0e8dd48f4293096fbfb9dd7d57e89b0b4.tar.bz2 | |
imx:mx6sxsabresd add board level support for usb
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6sxsabresd board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
to make host port work in HOST mode.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mx6sxsabresd/mx6sxsabresd.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 68d3718..02e82b2 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -25,6 +25,8 @@ #include <netdev.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> +#include <usb.h> +#include <usb/ehci-fsl.h> DECLARE_GLOBAL_DATA_PTR; @@ -252,6 +254,10 @@ int board_early_init_f(void) /* Active high for ncp692 */ gpio_direction_output(IMX_GPIO_NR(4, 16) , 1); +#ifdef CONFIG_USB_EHCI_MX6 + setup_usb(); +#endif + return 0; } @@ -272,6 +278,49 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } +#ifdef CONFIG_USB_EHCI_MX6 +#define USB_OTHERREGS_OFFSET 0x800 +#define UCTRL_PWR_POL (1 << 9) + +static iomux_v3_cfg_t const usb_otg_pads[] = { + /* OGT1 */ + MX6_PAD_GPIO1_IO09__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_GPIO1_IO10__ANATOP_OTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL), + /* OTG2 */ + MX6_PAD_GPIO1_IO12__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL) +}; + +static void setup_usb(void) +{ + imx_iomux_v3_setup_multiple_pads(usb_otg_pads, + ARRAY_SIZE(usb_otg_pads)); +} + +int board_usb_phy_mode(int port) +{ + if (port == 1) + return USB_INIT_HOST; + else + return usb_phy_mode(port); +} + +int board_ehci_hcd_init(int port) +{ + u32 *usbnc_usb_ctrl; + + if (port > 1) + return -EINVAL; + + usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + + port * 4); + + /* Set Power polarity */ + setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); + + return 0; +} +#endif + int board_init(void) { /* Address of boot parameters */ |