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| author | Nitin Garg <nitin.garg@freescale.com> | 2014-05-27 18:39:39 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-06-13 10:17:01 -0500 |
| commit | 6d87677d499f71a0ed3994f414bdbf9a7e6a4099 (patch) | |
| tree | 78f3abe568e7012bdbcb7c3814446d3bbf326a8f /board/freescale | |
| parent | e8072eb17fe56a72e000319cd7a9aa42eb4e1cef (diff) | |
| download | u-boot-imx-6d87677d499f71a0ed3994f414bdbf9a7e6a4099.zip u-boot-imx-6d87677d499f71a0ed3994f414bdbf9a7e6a4099.tar.gz u-boot-imx-6d87677d499f71a0ed3994f414bdbf9a7e6a4099.tar.bz2 | |
ENGR00315499-14 ARM:imx6:sabresd/arm2 Add USB HOST BSP support
Enable the USB EHCI on sabresd and arm2 boards to support USB mass
storage device.
Pins are configured in board_ehci_hcd_init for VBUS control.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mx6qarm2/mx6qarm2.c | 25 | ||||
| -rw-r--r-- | board/freescale/mx6sabresd/mx6sabresd.c | 52 |
2 files changed, 75 insertions, 2 deletions
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index 7e0c35e..de76c99 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2014 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -275,3 +275,26 @@ void ldo_mode_set(int ldo_bypass) } #endif +#ifdef CONFIG_USB_EHCI_MX6 +iomux_v3_cfg_t const usb_otg_pads[] = { + MX6_PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_ehci_hcd_init(int port) +{ + switch (port) { + case 0: + imx_iomux_v3_setup_multiple_pads(usb_otg_pads, + ARRAY_SIZE(usb_otg_pads)); + + /*set daisy chain for otg_pin_id on 6q. for 6dl, this bit is reserved*/ + mxc_iomux_set_gpr_register(1, 13, 1, 1); + break; + default: + printf("MXC USB port %d not yet supported\n", port); + return 1; + } + return 0; +} +#endif diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 0b283a8..5501db9 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2012-2014 Freescale Semiconductor, Inc. * * Author: Fabio Estevam <fabio.estevam@freescale.com> * @@ -1077,3 +1077,53 @@ void udc_pins_setting(void) mxc_iomux_set_gpr_register(1, 13, 1, 0); } #endif /*CONFIG_IMX_UDC*/ + +#ifdef CONFIG_USB_EHCI_MX6 +iomux_v3_cfg_t const usb_otg_pads[] = { + MX6_PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +iomux_v3_cfg_t const usb_hc1_pads[] = { + MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_ehci_hcd_init(int port) +{ + switch (port) { + case 0: + imx_iomux_v3_setup_multiple_pads(usb_otg_pads, + ARRAY_SIZE(usb_otg_pads)); + + /*set daisy chain for otg_pin_id on 6q. for 6dl, this bit is reserved*/ + mxc_iomux_set_gpr_register(1, 13, 1, 0); + break; + case 1: + imx_iomux_v3_setup_multiple_pads(usb_hc1_pads, + ARRAY_SIZE(usb_hc1_pads)); + break; + default: + printf("MXC USB port %d not yet supported\n", port); + return 1; + } + return 0; +} + +int board_ehci_power(int port, int on) +{ + switch (port) { + case 0: + break; + case 1: + if (on) + gpio_direction_output(IMX_GPIO_NR(1, 29), 1); + else + gpio_direction_output(IMX_GPIO_NR(1, 29), 0); + break; + default: + printf("MXC USB port %d not yet supported\n", port); + return 1; + } + return 0; +} +#endif |